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Boolean Minimizer

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Boolean Minimizer
R .Mohana Ranga Rao - (IJAEST) INTERNATIONAL JOURNAL OF ADVANCED ENGINEERING SCIENCES AND TECHNOLOGIES Vol No. 3, Issue No. 1, 012 - 014

An Innovative procedure to minimize Boolean function
R .Mohana Ranga Rao Department of Electronics and communication Engineering KITE college of Professional engineering sciences, JNTUH Shabad,India e-mail: mohana_rangarao@yahoo.co.in

Keywords- Boolean Function, Simplification, M-terms, Quine McCluskey, Face value

I.

INTRODUCTION

IJ
ISSN: 2230-7818

Boolean function minimization using M-terms is a modified Quine-McCluskey [4] [6] method; it is a very simple and systematic technique for minimizing Boolean functions. Why do we want to minimize a Boolean expression? By simplifying the logic function we can reduce the original number of digital components (gates) required to implement digital circuits. Therefore by reducing the number of gates, the chip size and the cost will be reduced, and the speed will be increased. Logic minimization uses a variety of techniques to obtain the simplest gate-level implementation of a logic function.

A

The heart of digital logic design is the Boolean algebra (Boole, 1954)[2].A few decades later C.E.Shannon showed how the Boolean algebra can be used in the design of digital circuits(Shannon,1938)[7].Using Boolean laws It is possible to minimize digital logic circuits(Huntington,1904).Since minimization with the use of Boolean laws is not systematic nor suitable for computer implementation, a number of algorithms were proposed in order to overcome the implementation issue. Karnaugh [3] proposed a technique for simplifying Boolean expressions using an elegant visual technique, which is actually a modified truth table intended to allow minimal sum-of-

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ES
II.

Abstract— In this paper a simplification technique is introduced to minimize a Boolean function. Karnaugh map (K-map) and Quine-McCluskey methods are well

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