Cupl

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  • Topic: Logic gate, Field-programmable gate array, Programmable logic device
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  • Published : March 9, 2013
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A TMEL – WinCUPL

............................................................ USER’S MANUAL

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Table of Contents

Section 1
Introduction to Programmable Logic ................................................ 1-1 1.1 What is Programmable Logic? ................................................ 1-1 1.2 Device Technologies and Packaging ...................................... 1-6 1.3 Programming Logic Devices ................................................... 1-7 1.4 Functionally Testing Logic Devices ......................................... 1-7

Section 2
Designing with the CUPL™ Language ............................................. 2-1 2.1 Declaration of Language Elements ......................................... 2-1 2.2 Usage of the Language Syntax ............................................... 2-2 2.3 Advanced Language Syntax ................................................. 2-14

Section 3
Using the CUPL Compiler ............................................................... 3-1 3.1 About The Compiler ................................................................ 3-1 3.2 Output File Format Descriptions .............................................. 3-6

Section 4
CUPL Tutorial .................................................................................. 4-1 4.1 Tutorial for Gates .................................................................... 4-1 4.2 Tutorial for COUNT10 ............................................................. 4-3 4.3 Tutorial for SQUARE.PLD ....................................................... 4-5

Section 5
CUPL Software Features ................................................................. 5-1 5.1 CUPL - PALexpert ................................................................... 5-1 5.2 CUPL - PLDmaster .................................................................. 5-1 5.3 CUPL - Total Designer ............................................................ 5-1 5.4 CUPL - Total Designer VHDL .................................................. 5-1 5.5 ONCUPL ................................................................................. 5-2 5.6 Liaison ..................................................................................... 5-2 5.7 PLPartition ............................................................................... 5-2 5.8 How to Contact Logical Devices............................................... 5-2

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Section 1
Introduction to Programmable Logic

1.1

What is
Programmable
Logic?

Programmable logic, as the name implies, is a family of components that contains arrays of logic elements (AND, OR, INVERT, LATCH, FLIP-FLOP) that may be configured into any logical function that the user desires and the component supports. There are several classes of programmable logic devices: ASICs, FPGAs, PLAs, PROMs, PALs, GALs, and complex PLDs.

1.1.1 ASICs

ASICs are Application Specific Integrated Circuits that are mentioned here because they are user definable devices. ASICs, unlike other devices, may contain analog, digital, and combinations of analog and digital functions. In general, they are mask programmable and not user programmable. This means that manufacturers will configure the device to the user specifications. They are used for combining a large amount of logic functions into one device. However, these devices have a high initial cost, therefore they are mainly used where high quantities are needed. Due to the nature of ASICs, CUPL and other programmable logic languages cannot support these devices.

1.1.2 Basic architecture of
a user programmable
device

First, a user programmable device is one that contains a pre-defined general architecture in which a user can program a design into the device using a set of development tools. The general architectures may vary but normally consists of one or more arrays of AND and OR terms for implementing logic functions. Many devices also contain...
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