Final Design of Reversible Gates Using Pass Transistor Logic

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A New Design Technique of Reversible Gates using Pass Transistor Logic Md. Sazzad Hossain1, Md. Minul Hasan1, Md. Motiur Rahman1, A. S. M. Delowar Hossain1, Ziaul Haque2 1

Computer Science & Engineering, Mawlana Bhashani Science and Technology University 1 Santosh, Tangail-1902, Bangladesh University Grants Commission of Bangladesh Email: sazzad_101@yahoo.com, x.rajib.x@gmail.com 2

Abstract - In this paper, we propose a new design technique of reversible gates with N-MOS based pass transistor. The conventional reversible gates are based on C-MOS with transmission gates. We also compare the proposed reversible gates with the conventional CMOS reversible gates.

II. Background
In conventional (irreversible) circuit synthesis, one typically starts with a universal gate library and some specification of a Boolean function. It is widely known that an arbitrary Boolean function can be implemented using only NAND gates. A NAND gate has two binary inputs (say A, B) but only one binary output (say P), and therefore is logically irreversible.

Keywords
Reversible computing, Fredkin gate, Feynman gates, full adder, CMOS, NMOS, pass transistor.

2.1 Reversible Gates and Circuits

I. Introduction
Irreversible hardware computation results in energy dissipation due to information loss. According to Landauer’s research, the amount of energy dissipated for every irreversible bit operation is at least KTln2 joules, where K=1.3806505*10-23m2kgs-2K-1 (joule/kelvin) is the Boltzmann’s constant and T is the temperature at which operation is performed [1, 2]. In 1973, Bennett showed that KTln2 energy would not dissipate from a system as long as the system allows the reproduction of the inputs from observed outputs [3, 4]. Reversible logic supports the process of running the system both forward and backward. This means that reversible computations can generate inputs from outputs and can stop and go back to any point in the computation history. Thus, reversible logic circuits offer an alternative that allows computation with arbitrarily small energy dissipation. Therefore, logical reversibility is a necessary (although not sufficient) condition for physical reversibility. The rest of the paper is composed of a number of chapters. Chapter two- Background; describes the origin of various reversible gates. Chapter three-Properties of Pass Transistor; describes the attributes and general operations of pass transistor. Chapter four-Construction of proposed reversible gates; describes how to construct our proposed reversible gates from the conventional reversible gates. Chapter five- Design of a Reversible Full Adder; describes how to construct a Reversible Full Adder using our proposed reversible logic gates. Chapter sixComparison; describes the performance of our proposed technique. Conclusion has been drawn in the Last Chapter. Fredkin and Toffoli [5] have shown that a basic building block which is logically reversible should have three binary inputs (say A, B and C) and three binary outputs (say P, Q and R). Feynman [6] has proposed the use of three fundamental gates: • The NOT gate, • The CONTROLLED NOT gate and • The CONTROLLED CONTROLLED NOT gate. Together they form a set of three building blocks with which we can synthesize arbitrary logic functions. The NOT gate can be realized, P=NOT A The CONTROLLED NOT can be realized, When P=A and If A=0, then Q=B else Q=NOT B So we can write Q=A XOR B Table 1: Truth table of CONTROLLED NOT A 0 0 1 1 B 0 1 0 1 P 0 0 1 1 Q 0 1 1 0

The CONTROLLED CONTROLLED NOT can be realized, When P=A, Q=B and If A AND B=0, then R=C, Else R=NOT C So we can write R= (A AND B) XOR C Table 2: Truth table of CONTROLLED CONTROLLED NOT A 0 0 0 0 1 1 1 1 B 0 0 1 1 0 0 1 1 C 0 1 0 1 0 1 0 1 P 0 0 0 0 1 1 1 1 Q 0 0 1 1 0 0 1 1 R 0 1 0 1 0 1 1 0

III. Properties of Pass Transistor
3.1 Pass Transistor Logic
Pass transistor NMOS based transistor which has a control signal. The control signal is responsible for...
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