design methodologies and tools

Design Methodologies and
Tools
• Design styles

– Full-custom design
– Standard-cell design
– Programmable logic

• Gate arrays and field-programmable gate arrays (FPGAs)
• Sea of gates
– System-on-a-chip (embedded cores)

• Design tools

1

Full-Custom Design
• Every gate is carefully designed and optimized
– Hierarchical design may be used, place-and-route tools typically used

• Advantages:
– High density, ideal for high volumes
– Performance optimization

• Disadvantages:
– High design time, cumbersome

• Applications: Datapaths in microprocessors
• High-paying jobs!
2

Full-Custom Design
(Contd.)
• Simple CAD tools suffice
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–
–
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Design entry
Schematic editor
Layout editor
DRC, LVS, Spice

• No need for sophisticated synthesis and design partitioning tools

3

Standard Cell Design

• Use pre-optimized SSI or MSI library cells

– NAND gates, multiplexers, adder slices, decoders, comparators,
RAM, ROM

• Reduces design time
• Lower density and lower performance
• Standardized at the logic or function level
Pitch-matched
cells
Routing channel

4

Standard Cells (Contd)
• CAD tools needed for partitioning design
• Technology mapping
• Design entry, DRC, LVS, simulations tools needed • Place and route tools
• Good for moderate volumes, as in ASICs, typically used for non-critical portions of a CPU

5

Programmable Logic
• Programmable logic blocks
– PLDs, PALs
– Fusible links (fuses) blown when current is exceeded

• Programmable interconnects
– Mask-programmed gate-arrays (MPGAs)
– Field-programmable gate-arrays (FPGAs)
– Sea of gates

6

Programmable Logic
• PLDs

• MPGAs

– Wide fan-in, 2-level SOP, optional flip-flops on output – Best known: 22V10 with
22 inputs, 10 outputs, from AMD
– Programmed by users
– Fusible links

– Also called gate arrays
– More dense than PLDs
– Predesigned transistors with customized wiring
– Wiring done during