Substrate Integrated Waveguide: Report: Design Of Experiment (DE)

CHAPTER 1
INTRODUCTION
1.1 Background
Design of Experiment (DOE) was developed in early 1920’s by Sir Ronald Fisher at the Rothamsted Agriculture Field Research Station in London, England. DOE can be used to observe how the design factor or parameters affect the performances. DOE also used to planning, designing and analyzing the experiment so that the objectives can be achieved and obtain effective results. The use of DOE in experiment reduce the time and effort with the availability of modern simulation tools such as the Advance Design Systems (ADS) and High Frequency Simulator Structure (HFSS) software that both have been use in this experiment. DOE is used in this project to vary the factor of the microstrip taper interconnection design.
The difference between this two structure is that the SIW waveguide contain holes or via as the electric wall. The main features in SIW waveguide are conducting a metal wall, type of dielectric material and the energy leakage through the gaps. These three need to be considered when designing the waveguide. The top and bottom of SIW waveguide is connected by periodic rows of metallic via or holes. In order to connect the SIW waveguide to the mounting SMA, to measure the s-parameter, a microstrip to SIW transition is required. A HFSS software has been used to simulate the microstrip transition or called microstrip
In its simplest structure, it consists of two parallel rows of metallic posts known as via or holes. The rapid development in Radio Frequency (RF) technology places a high demand on professional working in this field. The better performance on the SIW waveguide is when the transition covers the complete bandwidth of the SIW. The transition is an important bridge between non-planar and planar circuits. The first interconnect introduced was the microstrip taper. The tapered microstrip transition has largely been implemented because of the microstrip line is widely in use.
Nowadays, a new wideband microstrip to SIW transition is introduced. It has an additional two via at the microstrip taper. The via has the same diameter as the SIW via and placed symmetrically at both sides of the microstrip taper. Both type of tapers are designed and discussed in which have the better return loss at the same desired frequency.
The design parameters that have been obtain using DOE method is an important issue in designing the taper at needed frequency. For the result, both tapers are being compared to each other in the form of S-parameter and E-field for simulated and