Electrical Engineering Lab Session

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ELECTRICAL ENGINEERING LABORATORY SESSION 1
Title: RESISTOR NETWORKS
Name:Richard Lancaster
Date: 11th Sep 2010.Student Name: Richard Lancaster.
Id No: (09099972)
Course: B.Sc. Engineering Science
Subject: Electrical Engineering
Lecturer: Dr Martin Hayes

Objectives:
1. Introductory familiarisation with D.C measurements.
2. Introduction to the use of pSpice as a tool for emulating circuits. pSpice v9.1 can be downloaded from Moodle or via
http://www.electronics-lab.com/downloads/schematic/013/
3. Verification of the fundamental laws of Electrical Science. 4. Familiarise students with the process of Laboratory Report Writing and Submission for this module

EQUIPMENT:
Power Supply
Breadboard
Various Resistors
Multimeter
Leads
Laptop running pSpice Student Edition v9.1

Procedure
For each of the following circuits :-
(i) Generate a pSpice schematic that determines voltages and currents at all points of interest. (ii) In a UL setting (note this step will be necessary only for Lab1 and one other lab during the course of the semester) experimentally determine the voltage at the Node A and the currents that are highlighted in each circuit. (iii) For each circuit ensure that all results are presented in tabular form. (iv) You should explicitly compare your experimental results with your pSpice output in the tables that you generate.

The conclusion/observation sections of your report should focus on how you have demonstrated the validity, or otherwise, of Kirchoff’s laws.

P Spice Circuits 1-6:

Circuit 1:Current Required IR1
[pic]

Circuit 2:Currents Required IR1 and IR2

[pic]

Circuit 3:Currents Required IR2 and IR3

[pic]

Circuit 4:Currents Required IR2 and IR3 and IRC

[pic]

Circuit 5: (Replacing R3 with a 1K in circuit 4) Currents Required IR2 and IR3 and IRC

[pic]

Circuit 6: Using P Spice determine voltages and currents for a series parallel arrangement of not less than 5 resistors and one voltage source of your choice.

[pic]

Theory:

Circuit 1:Current Required IR1
RT = R1+R2=2.2k + 3.3k = 5.5k
IR1 = V/R = 10V/5.5k = 1.82m A
VA = IR1 = 1.82mA x 3.3k = 6V

Circuit 2:Currents Required IR1 and IR2
RT =R1//R2=2.2k // 3.3k = (2.2*3.3)/(2.2+3.3) = 1.32k
IT = 10V / 1.32k = 7.5 m A
IR1 = 3.3/5.5 x 7.5 = 4.5m A
IR2 = 2.2/5.5 x 7.5 = 3.0m A
VA = ItxR=7.5x1.32=10V

Circuit 3:Currents Required IR2 and IR3
RT = R1 + R2//R3 =1+1.32= 2.32k
IT = 10V / 2.32k = 4.3m A
IR2 = (3.3/5.5) x 4.310 = 2.58m A
IR3 = (2.2/5.5) x 4.310 = 1.72m A
VA = 4.3 x (2.2//3.3) = 4.3x1.32=5.676V

Circuit 4:Currents Required IR2 and IR3 and IRC
RT = ((R2//R3) + RA) // ( RB + RC)) + R1
= ((1.32 + .68) // 5.5) + R1
= (2//5.5) + 1
= 1.47+1=2.47k
IT = 10V / 2.47k = 4.04m A
IT=IRX(other leg of diagram)+IRC
IRC = 2/7.5 x 4.04 = 1.077m A
IRX=5.5/7.5x4.04=2.96mA
IR2 = R3/R2+R3x2.96=3.3/5.5 x 2.96 = 1.776m A
IR3 = 2.2/5.5 x 2.96 = 1.184m A

VA = IRX x R2//R3 = 2.96 x (1.32) = 3.9V
Circuit 5: (Replacing R3 with a 1K in circuit 4) Currents Required IR2 and IR3 and IRC Currents Required IR2 and IR3 and IRC

RT = (((R2//R3) + RA) // ( RB + RC)) + R1
= ((0.6875 + .68) // 5.5) + R1
= 1.095 + 1
= 2.095k
IT = 10V / 2.095k = 4.77m A
IT=IRX(other leg of diagram)+IRC
IRC = 1.3675 /6.8675 x 4.773 = 0.95m A
IRx=4.77-0.95=3.82m A on other leg of circuit
VA = 3.82 x 0.6875 (R2//R3) = 2.624V

IR2=1/3.2*3.82=1.193mA
IR3=2.2/3.2**3.82=2.626mA

Circuit 6:
Using pSpice determine voltages and currents for a series parallel arrangement of not less than 5 resistors and one voltage source of your choice.

RT=R1+((R2//R3)+RA))//RB+((R7+R8)//RC))
RT=1+(1.32+0.68)//(2.2+(2.2//3.3))
RT=1+(2//3.52)
RT=1+1.275
RT=2.275K
IT=10/2.275=4.395V
IRB=2/5.52*4.395=1.5922mA
IRA=3.52/5.52*4.395=2.802mA
VA=IR=2.803*1.32=3.699V

IR2=3.3/5.5*2.802=1.6812mA
IR3=2.2/5.5*2.802=1.1208mA

Results:

Circuit 1:Current Required IR1

|Circuit 1...
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