EC2354 2 marks

MAHAKAVI BHARATHIYAR COLLEGE OF ENGINEERING & TECHNOLOGY

pa ul .c om VASUDEVANALLUR, 627758.

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

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EC 2354 VLSI DESIGN

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.R ej TWO MARKS QUESTIONS WITH ANSWER

PREPARED BY
R.RAJATHI
ASSIATANT PROFESSOR
DEPT OF ECE
MBCET

UNIT-I CMOS TECHNOLOGY

1. What are four generations of Integration Circuits?
SSI (Small Scale Integration)
MSI (Medium Scale Integration)
LSI (Large Scale Integration)
VLSI (Very Large Scale Integration)

2. Give the advantages of IC?

pa ul .c om 
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 Size is less
 High Speed
 Less Power Dissipation
3. Give the variety of Integrated Circuits?

 More Specialized Circuits
 Application Specific Integrated Circuits(ASICs)
 Systems-On-Chips

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4. Give the basic process for IC fabrication

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.R ej  Silicon wafer Preparation
 Epitaxial Growth
Oxidation
 Photolithography
 Diffusion
 Ion Implantation
 Isolation technique
 Metallization
 Assembly processing & Packaging

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5. What are the various Silicon wafer Preparation?
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Crystal growth & doping
Ingot trimming & grinding
Ingot slicing
Wafer polishing & etching
Wafer cleaning.

6. Different types of oxidation?
Dry & Wet Oxidation

7. What is the transistors CMOS technology provides?
N-type transistors & p-type transistors.

Drain , Source & Gate
9. What is Enhancement mode transistor?

pa ul .c om 8. What are the different layers in MOS transistors?

The device that is normally cut-off with zero gate bias.
10. What is Depletion mode Device?

The Device that conduct with zero gate bias.
11. When the channel is said to be pinched –off?

If a large Vds is applied this voltage with deplete the Inversion layer .This Voltage effectively pinches off the channel near the drain.
12. Give the different types of CMOS process?

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 p-well process
 n-well process Silicon-On-Insulator Process
 Twin- tub Process

.R ej 13. What are the steps involved in twin-tub process?
Tub Formation

Thin-oxide Construction