Digital Design Flow

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  • Topic: Electronic design automation, Application-specific integrated circuit, Verilog
  • Pages : 23 (5497 words )
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  • Published : September 1, 2010
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A Thesis Presented in Partial Fulfillment of the Requirements for the Degree Master of Science in the Graduate School of The Ohio State University

By Sagar Vidya Reddy, B.E. ***** The Ohio State University 2001

Master’s Examination Committee: Professor. Joanne E. DeGroat, Adviser Professor. Steven B. Bibyk

Approved by

Adviser Department of Electrical Engineering


VLSI (Very Large Scale Integration) IC design flow is a term used to describe the process of chip design. The circuit designer/design group uses a multitude of computer aided design tools throughout the design flow to tape out an integrated circuit IC. There are numerous computer aided design (CAD) tools available commercially to help such designers in design. The design tools and the order in which they are used is termed as the design flow. CAD tools however do have certain problems associated with them. Cost, accessibility, compatibility and reliability are a few of such problems. At the university level, usability, tutorials and adequate documentation is needed to facilitate students to adapt and familiarize themselves with the CAD tool suites in a short time. In mixed signal chips, there are two distinct phases of design, the analog and the digital part. The analog part of the chip (probably containing a few hundred ii

transistors) consumes a considerable amount of time to design. The digital part of the chip (probably containing tens of thousands to a million transistors) needs to be developed in a relatively short period of time. Thus design team needs to place a few thousand gates quickly and reliably. To support this, the choice of CAD tools becomes critical. A good CAD tool can drastically reduce the time required to design a large digital block. The scope of this thesis is to search for an optimal digital design flow. The aim is to use a set of commercial and open sourced tools and bring digital logic design to such a stage that the design can be shipped for fabrication or attached to an analog entity for fabricated into a mixed signal chip. The stress in this thesis is going to be on evolving a streamlined design flow, which is quick, cheap, reliable and acceptable. Conclusions will be reached as to how a particular tool is best suited for each stage of design. These design suites will be compared and contrasted with respect to various qualities like cost, accessibility, usability, etc. Most non-commercial CAD tools fail to meet the industry’s requirements when the design becomes technology specific. Most industrially accepted CAD tools are expensive. It is here that a cheaper design alternative is required. Solutions to this problem using Electric and TestBencher are suggested in this thesis. In this document, the primary focus is on three tools, TestBencher, X -HDL3 and Electric. These CAD tools were chosen, as they seemed ideal for a university environment.


All the chapters start with a brief explanation of a design stage. After a brief explanation, every chapter is further subdivided into various sections. Each section deals with a particular aspect of design and how the design can be completed using one of the CAD tools. Throughout this document an example based approach is adopted. The examples chosen are simple circuits to increase readability.


To Nipa



I would like to thank my friend Nipa for her continuous motivation, moral support, encouragement and love. I would like to thank Prof. DeGroat for her suggestions, support, guidance and the inspiration I got while working with her during the course of my masters degree. I am especially indebted to Prof. Bibyk for all his invaluable suggestions, advice, support, guidance and help.


Dec 24, 1977 Born – Guntur, India.

1995 – 1999

B.E. Electrical & Electronics Engineering, Bangalore University, Bangalore, India.

1999- present

Masters student, The Ohio State...
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