2012

Combinational Logic

Combinational Logic: The outputs depend on the present values of inputs. In other words, they are logic combinations of the inputs. Sequential Logic: The outputs depend not only on the present but also on the past inputs. Problem Statement

Truth Table

min. number of gates min. number of inputs to gates

Simplification

min. propagation time min. number of interconnections

Implementation

type of gates

Adders

Half-adder performs addition of two bits. Full-adder performs addition of three bits.

Half-adder Inputs x 0 0 1 1 y 0 1 0 1 Outputs C 0 0 0 1 S 0 1 1 0 x y S C

S xy xy x y C x y

Feza Kerestecioğlu, K.H.Ü.

1

EE 205 Lecture Notes

2012

Adders

Half-adder x y

x y

S C

S xy xy C x y

S

C

x y

S

x y

S C

C

S xy xy (1, 2) (0, 3) ( x y )( x y)

S (0, 3) xy xy xy C

Adders

Full-adder Inputs x 0 0 0 0 1 1 1 1 y 0 0 1 1 0 0 1 1 z 0 1 0 1 0 1 0 1 Outputs C 0 0 0 1 0 1 1 1 S 0 1 1 0 1 0 0 1 x y z S z x y C x yz 00 x 0 1 1 y 01 11 10 1 1 1 x yz 00 x 0 1 y 01 11 10 1 1 1 1

z S xyz xyz xyz xyz

z C xy yz xz

Feza Kerestecioğlu, K.H.Ü.

2

EE 205 Lecture Notes

2012

Adders

Full-adder can also be implemented with half-adders: 1. Add x and y by a half-adder 2. Add z to the output of Step 1. 3. OR the carry outputs of Step 1 and 2.

x y

S1

S

HA

C1

HA

C2

C

z

S ( x y) z ( xy xy) z ( xy xy) z ( xy xy) z ( xy xy) z ( x y)( x y) z xyz xyz ( xy xy) z xyz xyz xyz xyz

C xy ( x y) z xy ( xy xy) z xy xyz xyz xy xyz xyz xyz xyz xy ( x x) yz ( y y) xz xy yz xz

Subtractors

Half-subtractor performs subtraction of one bit from another. Full-subtractor performs subtraction of sum of two bits from a third one.

Half-subtractor Inputs x 0 0 1 1 y 0 1 0 1 Outputs B 0 1 0 0 D 0 1 1 0 x y D B

D xy xy x y B x y

Feza Kerestecioğlu, K.H.Ü.

3

EE 205 Lecture Notes

2012

Subtractors

Full-subtractor xyz Inputs Outputs x 0 0 0 0 1 1 1 1 y 0 0 1 1 0 0 1 1 z 0 1 0 1 0 1 0 1 B 0 1 1 1 0 0 0 1 D 0 1 1 0 1 0 0 1 z x y D1 D z D xyz xyz xyz xyz z B xy yz xz x y yz 00 x 0 1 1 01 11 10 1 1 1 x yz 00 x 0 1 y 01 11 10 1 1 1 1

HS

B1

HS

B2

B

Code Conversion

Example: BCD to Excess-3 conversion CD 00 AB BCD Excess-3 A B C D w x y z 0 0 0 0 0 0 1 1 0 0 0 1 0 1 0 0 0 0 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 0 0 1 1 1 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 0 1 1 1 0 0 1 1 1 0 0 1 0 1 0 X X X X 10 00 01 0 0 CD 00 AB 00 0 01 1

01 11 10 0 1 X 1 0 1 X X 0 1 X X

01 11 10 1 0 X 1 1 0 X X 1 0 X X

11 X 1

11 X 10 0

w A BD BC

CD 00 AB 00 1 01 1 01 11 10 0 0 X 0 1 1 X X 0 0 X X

x BD BC BCD

CD 00 AB 00 1 01 1 01 11 10 0 0 X 0 0 0 X X 1 1 X X

11 X 10 1

11 X 10 1

y CD CD

z D

Feza Kerestecioğlu, K.H.Ü.

4

EE 205 Lecture Notes

2012

Code Conversion

Example: BCD to Excess-3 conversion

w A BD BC A B(C D) x BD BC BCD B(C D) B(C D) B (C D) y CD CD C D z D A w x

B C

y D z

Code Conversion

Example: Gray code to binary conversion Gray 0 0 0 0 1 1 1 1 0 0 1 1 1 1 0 0 0 1 1 0 0 1 1 0 Binary y 0 0 1 1 0 0 1 z 0 1 0 1 0 1 0 A B C A 0 0 0 0 1 1 1 1

xA

BC 00 0 1 1 1 01 11 10 1 1 A BC 00 0 1 1 01 11 10 1 1 1

A B C x

y AB AB

A B

y ABC ABC ABC ABC ( A B)C ( A B)C ( A B) C

x y z

1 1

Feza Kerestecioğlu, K.H.Ü.

5

EE 205 Lecture Notes

2012

EX-OR, Equivalence and Error Handling

EX-OR function: x y xy xy (1, 2)

x0 x

x 1 x

x1 x2 xn1 xn xi

i 1 n

xx 0

x x 1

x y x y ( x y)...