Topics: Counter, Output, Input Pages: 6 (1290 words) Published: March 14, 2013
DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock

September 1986 Revised March 2000

DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
General Description
The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously, so that the outputs change together when so instructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (rippleclock) counters. The outputs of the four master-slave flip-flops are triggered by a LOW-to-HIGH level transition of either count (clock) input. The direction of counting is determined by which count input is pulsed while the other count input is held HIGH. The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while the load input is LOW. The output will change independently of the count pulses. This feature allows the counters to be used as modulo-N dividers by simply modifying the count length with the preset inputs. A clear input has been provided which, when taken to a high level, forces all outputs to the low level; independent of the count and load inputs. The clear, count, and load inputs are buffered to lower the drive requirements of clock drivers, etc., required for long words. These counters were designed to be cascaded without the need for external circuitry. Both borrow and carry outputs are available to cascade both the up and down counting functions. The borrow output produces a pulse equal in width to the count down input when the counter underflows. Similarly, the carry output produces a pulse equal in width to the count down input when an overflow condition exists. The counters can then be easily cascaded by feeding the borrow and carry outputs to the count down and count up inputs respectively of the succeeding counter.

s Fully independent clear input s Synchronous operation s Cascading circuitry provided internally s Individual preset each flip-flop

Ordering Code:
Order Number DM74LS193M DM74LS193N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Body 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Connection Diagram

© 2000 Fairchild Semiconductor Corporation




Logic Diagram




Timing Diagram

Note A: Clear overrides load, data, and count inputs Note B: When counting up, count-down input must be HIGH; when counting down, count-up input must be HIGH.




Absolute Maximum Ratings(Note 1)
Operating Free Air Temperature Range Supply Voltage Input Voltage Storage Temperature Range −0°C to +70°C 7V 7V −65°C to +125°C Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation.

Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL fCLK tW tSU tH tEN TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Clock Frequency (Note 2) Clock Frequency (Note 3) Pulse Width of any Input (Note 4) Data Setup Time (Note 4) Data Hold Time (Note 4) Enable Time to Clock (Note 4) Free Air Operating Temperature 20 20 0 40 0 70 0 Parameter Min 4.75 2 0.8 −0.4 8 25 Nom 5 Max 5.25 Units V V V mA mA MHz ns ns ns ns °C

Note 2: CL = 15 pF, R L = 2 kΩ, IA = 25°C and VCC = 5V. Note 3: CL = 50 pF, R L = 2 kΩ, IA = 25°C and VCC = 5V. Note 4: TA = 25°C and V CC = 5V.

DC Electrical Characteristics
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