8086 Notes

Topics: Computer memory, Dynamic random access memory, Output Pages: 104 (26024 words) Published: March 28, 2013
Microprocessors and Microcontrollers/Interfacing with 8086

Lecture Notes

Module 3 Learning unit 8: Interface
• • • • • • • • • We have four common types of memory: Read only memory (ROM) Flash memory (EEPROM) Static Random access memory (SARAM) Dynamic Random access memory (DRAM). Pin connections common to all memory devices are: The address input, data output or input/outputs, selection input and control input used to select a read or write operation. Address connections: All memory devices have address inputs that select a memory location within the memory device. Address inputs are labeled from A0 to An. Data connections: All memory devices have a set of data outputs or input/outputs. Today many of them have bi-directional common I/O pins. Selection connections: Each memory device has an input, that selects or enables the memory device. This kind of input is most often called a chip select ( CS ), chip enable ( CE ) or simply select ( S ) input.


O0 O1 O2

A1 A2








MEMORY COMPONENT ILLUSTRATING THE ADDRESS, DATA AND , CONTROL CONNECTIONS • • RAM memory generally has at least one CS or S input and ROM at least one CE . If the CE , CS , S input is active the memory device perform the read or write.

M. Krishna Kumar/IISc. Bangalore

M3/V1/June 04/1

Microprocessors and Microcontrollers/Interfacing with 8086

Lecture Notes

• • • • • • • • • • • • • • • • • • • • • • •

If it is inactive the memory device cannot perform read or write operation. If more than one CS connection is present, all most be active to perform read or write data. Control connections: A ROM usually has only one control input, while a RAM often has one or two control inputs. The control input most often found on the ROM is the output enable ( OE ) or gate ( G ), this allows data to flow out of the output data pins of the ROM. If OE and the selected input are both active, then the output is enable, if OE is inactive, the output is disabled at its high-impedance state. The OE connection enables and disables a set of three-state buffer located within the memory device and must be active to read data. A RAM memory device has either one or two control inputs. If there is one control input it is often called R/ W . This pin selects a read operation or a write operation only if the device is selected by the selection input ( CS ). If the RAM has two control inputs, they are usually labeled WE or W and OE or G . ( WE ) write enable must be active to perform a memory write operation and OE must be active to perform a memory read operation. When these two controls WE and OE are present, they must never be active at the same time. The ROM read only memory permanently stores programs and data and data was always present, even when power is disconnected. It is also called as nonvolatile memory. EPROM (erasable programmable read only memory) is also erasable if exposed to high intensity ultraviolet light for about 20 minutes or less, depending upon the type of EPROM. We have PROM (programmable read only memory) RMM (read mostly memory) is also called the flash memory. The flash memory is also called as an EEPROM (electrically erasable programmable ROM), EAROM (electrically alterable ROM), or a NOVROM (nonvolatile ROM). These memory devices are electrically erasable in the system, but require more time to erase than a normal RAM. EPROM contains the series of 27XXX contains the following part numbers : 2704(512 * 8), 2708(1K * 8), 2716(2K * 8), 2732(4K * 8), 2764(8K * 8), 27128(16K * 8) etc. Each of these parts contains address pins, eight data connections, one or more chip selection inputs ( CE ) and an output enable pin ( OE ). This device contains 11 address inputs and 8 data outputs. If both the pin connection CE and OE are at logic 0, data will appear on the output connection . If both the pins are not at logic 0, the data...
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