# Quiz on Computer Architecture and Organization

Topics: Computer, Central processing unit, Virtual memory Pages: 5 (1106 words) Published: December 13, 2011
G.H.RAISONI COLLEGE OF ENGINEERING
Department of Computer Science & Engg.
Question Bank
Session 2011-12
Year/Branch/Sem/Sec : 3rd/CSE/ B
Subject: Computer Architecture & Organization
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UNIT 1.
1. Explain the three major design levels in a computer system. 2. What are the different standard steps in register level design ? 3. Describe in detail the components which are generally used to design register level circuits.

1. What are the different levels of design ? Discuss with suitable example. 2. How performance evaluation is done using simulation technique ? 3. Explain processor level components.
4. Explain the performance parameters for a computer system . 5. What are the different functional units of basic computer system ? 6. Compare different bus system for connection between CPU , Memory  and I/O Devices.

1. Explain prototype structure , performance measurement and queuing Model steps of processor level design .

UNIT 2.
1. How the following cases are interpreted in floating point format ; a)                  Not a number
b)                  Overflow
c)                  -00
d)                 +00
1. Explain restoring and non-restoring algorithms for integer division. 2. What is an overflow ? How is it detected ?
3. Explain with suitable examples the need for the following addressing Modes ;
a)                  Index
b)                  Indirect
c)                  Autoincrement
d)                 Autodecrement
1. Explain the concept for Booth’s multiplication algorithm . 2. Derive an algorithm in flowchart form for restoring & non-restoring method of integer division and apply both algorithms for 10/3 division. 1. Explain the IEEE standard floating point format and represent decimal numbers in this format ;

i)                    -0.000125    ii)             3.92*102 1. Explain in brief bit sliced  ALU.

1. Suppose that the hex content of two CPU registers in a 32-bit processor are as follows :
Ro = 0 1 2 3 7 6 5 4                         R1 = 7 6 5 4 E D C B The following store word instructions are executed to transfer the contents Of these registers to main memory M.

STORE  Ro,ADR                         STORE  R1,ADR+4 Assuming that M is byte addressable give the content of all memory locations affected by the above code . a)      If the computer is Big-endian  and

b)      If the computer is Little-endian

1. Explain base register and index addressing mode . What are the advantages of using these addressing modes ?
1. Solve the multiplication by using Booth’s algorithm :                                Multiply -13 with +12, 13 x -6 1. Describe IEEE standard floating point number format .
2. Using non-restoring division method solve the following ; 9/4 3. Give the set of instructions required to execute the following statement for two address processes .           X = (A +B)*(C+D) 1. Develop Booth’s algorithm for multiplying binary integers in signed 2’s complement representation . Show step by step multiplication process using  this algorithm when the following numbers are multiplied ;  -15 x 13

UNIT 3.
1. What are advantages and disadvantages of hardwired method of control unit design. Explain any one method of hardwired control unit design . 1. Write a brief note on microprogramming .What are the ways to increase  the speed in microprogramming ?

1. Explain delay element method and sequence counter method of control unit design in brief .
1. Draw and explain microprogrammed control unit .
2. What is micro-program sequencing ?
3. Explain how emulation facilities transition into a...