Notes
CMOS Fabrication Technology CMOS Fabrication Technology
Contents
1. Introduction 2. Fabrication Process Flow - Basic Steps 2.3. The CMOS n-Well Process 4. Advanced CMOS Fabrication Technologies Twin-Tub (Twin-Well) CMOS Process Silicon-on-Insulator (SOI) CMOS Process
Butterfly’s
Page 1
CMOS Fabrication Technology
CMOS Fabrication Technology
1. Introduction In the MOS chip fabrication, special emphasis needs to be laid on general outline of the process flow and on the interaction of various processing steps, which ultimately determine the device and the circuit performance characteristics. In order to establish links between the fabrication process, the circuit design process and the performance of the resulting chip, the circuit designers must have a working knowledge of chip fabrication to create effective designs and in order to optimize the circuits with respect to various manufacturing parameters. Also, the circuit designer must have a clear understanding of the roles of various masks used in the fabrication process, and how the masks are used to define various features of the devices on-chip. The following discussion will concentrate on the well-established CMOS fabrication technology, which requires that both n-channel (nMOS) and p-channel (pMOS) transistors be built on the same chip substrate. To accommodate both nMOS and pMOS devices, special regions must be created in which the semiconductor type is opposite to the substrate type. These regions are called wells or tubs. A p-well is created in an n-type substrate or, alternatively, an n- well is created in a p-type substrate. In the simple n-well CMOS fabrication technology presented, the nMOS transistor is created in the p-type substrate, and the pMOS transistor is created in the n-well, which is built-in into the p-type substrate. In the twin-tub CMOS technology, additional tubs of the same type as the substrate can also be created for device optimization.
Butterfly’s
Page 2
Contents
1. Introduction 2. Fabrication Process Flow - Basic Steps 2.3. The CMOS n-Well Process 4. Advanced CMOS Fabrication Technologies Twin-Tub (Twin-Well) CMOS Process Silicon-on-Insulator (SOI) CMOS Process
Butterfly’s
Page 1
CMOS Fabrication Technology
CMOS Fabrication Technology
1. Introduction In the MOS chip fabrication, special emphasis needs to be laid on general outline of the process flow and on the interaction of various processing steps, which ultimately determine the device and the circuit performance characteristics. In order to establish links between the fabrication process, the circuit design process and the performance of the resulting chip, the circuit designers must have a working knowledge of chip fabrication to create effective designs and in order to optimize the circuits with respect to various manufacturing parameters. Also, the circuit designer must have a clear understanding of the roles of various masks used in the fabrication process, and how the masks are used to define various features of the devices on-chip. The following discussion will concentrate on the well-established CMOS fabrication technology, which requires that both n-channel (nMOS) and p-channel (pMOS) transistors be built on the same chip substrate. To accommodate both nMOS and pMOS devices, special regions must be created in which the semiconductor type is opposite to the substrate type. These regions are called wells or tubs. A p-well is created in an n-type substrate or, alternatively, an n- well is created in a p-type substrate. In the simple n-well CMOS fabrication technology presented, the nMOS transistor is created in the p-type substrate, and the pMOS transistor is created in the n-well, which is built-in into the p-type substrate. In the twin-tub CMOS technology, additional tubs of the same type as the substrate can also be created for device optimization.
Butterfly’s
Page 2