Computer Architecture
Strayer University
Week 4 Assignment 1: Computer Archtecture
Intro to Info Technology – CIS 106031VA016-1144-001
Professor John Murnane
May 4, 2014 Von Neumann Architecture
Von Neumann architecture is a stored program architecture with no differentiation between data and instruction memory. Both the data and instruction reside on a single chip. The concept of no differentiation between data and instruction memory is accurate, but existing on one chip has nothing to do with it. Most computer memories in modern times require multiple chips. At the time Von Neumann did his work integrated circuit chips had not yet been invented, let alone used for storage - that came later in the 1970s.
Furthermore, Von Neumann had not "invented" EDSAC. Some of his ideas inspired it, but its lead designer was Maurice Wilkes.
An essential partition of a Von Neumann machine is that it implements a Turing-complete Finite State Machine - that is that- the machine follows a program in a series of discrete stages, ending in a specific state after each stage.
System Bus
Bus speed can make a major impact. In any modern system, the processor runs significantly faster than the memory bus; the ratio of processor speed to bus speed is the bus multiplier. Basically, the lower the multiplier the better. What happens with a faster bus is that more data can be fed to the processor –known as throughput- and the time it takes to start a request is usually lower – this is called latency. If you have a really fast processor on a slow bus, the processor will sit idle most of the time. To compensate for the fact that extremely fast busses either cannot be built (due to length of the bus) or are prohibitively expensive, caching is used to help make it appear as if the memory was as fast as the processor. If your processor has a large, in most applications L2 or L3 cache the difference in lessened. So, as a long winded answer to your
Week 4 Assignment 1: Computer Archtecture
Intro to Info Technology – CIS 106031VA016-1144-001
Professor John Murnane
May 4, 2014 Von Neumann Architecture
Von Neumann architecture is a stored program architecture with no differentiation between data and instruction memory. Both the data and instruction reside on a single chip. The concept of no differentiation between data and instruction memory is accurate, but existing on one chip has nothing to do with it. Most computer memories in modern times require multiple chips. At the time Von Neumann did his work integrated circuit chips had not yet been invented, let alone used for storage - that came later in the 1970s.
Furthermore, Von Neumann had not "invented" EDSAC. Some of his ideas inspired it, but its lead designer was Maurice Wilkes.
An essential partition of a Von Neumann machine is that it implements a Turing-complete Finite State Machine - that is that- the machine follows a program in a series of discrete stages, ending in a specific state after each stage.
System Bus
Bus speed can make a major impact. In any modern system, the processor runs significantly faster than the memory bus; the ratio of processor speed to bus speed is the bus multiplier. Basically, the lower the multiplier the better. What happens with a faster bus is that more data can be fed to the processor –known as throughput- and the time it takes to start a request is usually lower – this is called latency. If you have a really fast processor on a slow bus, the processor will sit idle most of the time. To compensate for the fact that extremely fast busses either cannot be built (due to length of the bus) or are prohibitively expensive, caching is used to help make it appear as if the memory was as fast as the processor. If your processor has a large, in most applications L2 or L3 cache the difference in lessened. So, as a long winded answer to your