Altera Quartus Experiment

Report of Experiment 28 - Digital Electronics with Altera Quartus
Student ID 200907437 (group 41)
ELEC 211
30 Nov 2012 and 7 Dec 2012

Abstract
The experiment mainly introduced the fundamental function and application of the software Altera
Quartus II with the DE1 development board and a host personal computer. The whole experiment contains five sections (or targets). The experimenters followed the guidance from the lab handout and accomplished the targets designed in the five sections. After completed the experiments, the experiments became more familiar with the operations and applications of the software and obtained some useful skills in schematic capture, AHDL combinational, sequential and state machine design and machine design.
Simulation the project which holds the entered schematic is the last step before program the FPGA package. The aim of simulation step is to observe the output of the circuit and check whether there is anything does not match the design requirements. If there is something wrong with the schematic and detected by simulation, experimenters can amendment the schematic. The subprogram Altera U.P.
Simulator was applied in this step. The created project (dec7448.qpf) was opened by the subprogram and a new simulation file with extension name .vwf was generated. Then the pins which need to display their digital waveforms were selected and the simulation result was obtained after drawing the input pins waveform. The simulation result will be added in the result section.
5. Since the above operations were all completed correctly, this step aimed to program and tests the designed circuit with the DE1 development board and record the numbers showed by 7-segment displays.
There was an essential operation before program, that is, to check the pins assignment. Therefore, the
Pin Planner window was opened and the locations of pins on the DE1 board were selected. After this execution, the schematic displayed the added pin assignment labels beside the pins. Next, the
3. After compiled the design project and 11 warnings were detected, a state diagram was drawn with the State Machine Viewer subprogram. Then the project was simulated and a resulting waveform was generated and recorded.
4. Applied the Quartus II inner symbol creating function, a single pulsar components electrical symbol was generated and placed in an empty Graphics Editor window. In order to display the required performance of the pushbutton enabled counter by the DE1 board, the pulsar symbol was followed with a counter symbol (to realize counter function) and a decoder (to display the function on 7segment displays). Then the schematic of the second assignment was completed.
5. Following the step 4, the entered schematic was compiled and simulated. After these operations were ensured successful, the design was programmed on the DE1 development board. The simulation result and photos about DE1 boards performances were obtained.
6. For the third part, the main part of designing task was accomplished by writing AHDL code files.
The Adder/Subtractors main function and working principles were defined in an AHDL file with name liu-peng-73. The code will be explained and then added in the result displaying part. Then the