flip flops circuits

Class 13: Flip Flops
Topics:
1. TOC
2. Introduction
3. Types of Flip Flops
4. Types of Flip Flops
5. D Flip Flop Operation
6. D Flip Flop Master Circuit
7. D Flip Flop Circuit
8. Tri-State Inverter
9. Flip-Flop Ideas
10. Flip-Flop Ideas

Joseph A. Elias, PhD

1

Class 13: Flip Flops
Introduction (Martin c.7)
Flip Flops basics:
•Storage elements for synchronous circuits (what is synchronous?)
•Break up any race conditions or oscillations, i.e., feedback loops around a cyclic logic circuit
•Inputs: normally have 1 or 2 input signals and a clock
•Outputs: differential outputs Q and Q’
•output latched or stored on rising/falling edge of clock
•output stable until next rising/falling edge of clock
•Can optionally have set and/or reset asynchronous inputs
•regardless of state of the clock, the outputs will either be set to a 1 or reset to a 0
•Typical techniques
•master_slave
•edge_sensitive
•Typical configurations:
•SR (set_reset)
•D
•JK
•T (toggle)
•D FF is the most common for ICs
SR flip flop symbol
SR flip flop symbol
•changes on positive
•changes on negative going clock edge going clock edge

Joseph A. Elias, PhD

2

Class 13: Flip Flops
Types of Flip Flops (Martin c.7)

•D

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•SR

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•JK

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•T

realized by tying J and K together from a JK FF
Joseph A. Elias, PhD

3

Class 13: Flip Flops
Types of Flip Flops (Martin c.7)

•D
•cascade of two latches with opposite clock phases
•best choice (usually) for IC design
•after FF is clocked, output is equal to the D value just before the clock changed
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•SR
•same as D FF if S=D and R=D’
•can be set, reset, or remain in its previous state
•intedeterminate state