3d Transistor

Topics: Transistor, Semiconductor, Silicon Pages: 5 (1090 words) Published: June 22, 2013


1| Acknowledgment| 3|
2| Introduction to 3D transistors| 4|
3| Need of 3D transistors| 5|
4| Operation| 6|
5| Comparison with 2D transistors| 9|
6| Advantages| 10|
7| Limitations | 10|
8| Applications | 11|
9| Conclusion | 11|
10| References | 11|
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There's no denying that the future of computing lies in small, low-power solutions coupled with big-iron cloud services. With 3D transistors, Intel may finally have the ammunition it needs to do battle in the smart phone and tablet markets. Intel made one its most significant technology announcement ever by stating it will base upcoming processors on 3D transistors. This announcement will drive its chip development over the next several years. This non-planar transistor architecture will be used by Intel Corporation in Ivy Bridge processors.

It can get confusing very quickly because there are a few technical terms being bandied about to describe the new transistor structure. Intel calls it generically 3D but technically it's a Tri-Gate transistor. The traditional flat two-dimensional "planar" gate is replaced with a thin three-dimensional silicon fin that rises up vertically from the silicon substrate. The gate wraps around the fin (see image below). The current is controlled by using a gate on each of the three sides of the fin--two on each side and one across the top--rather than just one on top, as is the case with the 2D planar transistor. The additional control enables as much transistor current flowing as possible when the transistor is in the 'on' state (for performance), and as close to zero as possible when it is in the 'off' state (to minimize power), and enables the transistor to switch very quickly between the two states (again, for performance).

It's necessary to sustain Moore's Law--doubling the number of transistors on a silicon device every two years. As device dimensions become prohibitively small, cramming in transistors in the traditional two-dimensional fashion becomes impossible. So, 3D or vertical transistors become necessary. The need for 3D transistors arose because of the following advantages- * More transistors can be packed in the same space.

* Current leakage is reduced to near 0 while the gates can still switch On and Off more than 100 billion times per second. * Less power is needed to carry out the same action.
* The innovation only adds 2-3% to the cost of making a chip. * Less heat would be generated.
* Speed is improved.


In a traditional planar transistor, when a voltage is applied at the gate, the transistor is said to be in ‘ON’ state and allows current to flow from source to drain. When the voltage is removed, the current stops flowing. In reality, trace amounts of current will constantly flow between the source and the drain. This so-called "leakage current" wastes precious power and becomes even more of a problem as transistors get smaller and more numerous.

Basically, that little strip of blue, the inversion layer, is the region of material near the gate that turns into an electrical conductor when exposed to a voltage. Now, as transistor gates get smaller, that little strip of blue conducting material naturally gets smaller, and as that little strip of blue gets smaller, less current is able to squeeze through it. When the gate and inversion layer get really small, as they are at the 22nm feature size, that layer can only let a tiny trickle of electrons flow through when the switch is on. But there's already a tiny trickle of (leakage) current flowing through when the switch is off, so the end result...
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