Very Long Instruction Word Architecture

Topics: Central processing unit, Instruction set, Superscalar Pages: 15 (3946 words) Published: April 3, 2013
Term Paper

Course code :CSE 211
Course title: Computer Organisation and

Submitted to: Ramanpreet Kaur Lamba

Submitted by:
K. Nabachandra Singha

Very-Long Instruction Word (VLIW)
Computer Architecture


VLIW architectures are distinct from traditional RISC and CISC architectures implemented in current mass-market microprocessors. It is important to distinguish instruction-set architecture—the processor programming model—from implementation—the physical chip and its characteristics.

VLIW microprocessors and superscalar implementations of traditional instruction sets share some characteristics—multiple execution units and the ability to execute multiple operations simultaneously. The techniques used to achieve high performance, however, are very different because the parallelism is explicit in VLIW instructions but must be discovered by hardware at run time by superscalar processors.

VLIW implementations are simpler for very high performance. Just as RISC architectures permit simpler, cheaper high-performance implementations than do CISCs, VLIW architectures are simpler and cheaper than RISCs because of further hardware simplifications. VLIW architectures, however, require more compiler support.


Currently, in the mid 1990s, IC fabrication technology is advanced enough to allow unprecedented implementations of computer architectures on a single chip. Also, the current rate of process advancement allows implementations to be improved at a rate that is satisfying for most of the markets these implementations serve. In particular, the vendors of general-purpose microprocessors are competing for sockets in desktop personal computers (including workstations) by pushing the envelopes of clock rate (raw operating speed) and parallel execution.

The market for desktop microprocessors is proving to be extremely dynamic. In particular, the x86 market has surprised many observers by attaining performance levels and price/performance levels that many thought were out of reach. The reason for the pessimism about the x86 was its architecture (instruction set). Indeed, with the advent of RISC architectures, the x86 is now recognized as a deficient instruction set.

Instruction set compatibility is at the heart of the desktop microprocessor market. Because the application programs that end users purchase are delivered in binary (directly executable by the microprocessor) form, the end users’ desire to protect their software investments creates tremendous instruction-set inertia.

There is a different market, though, that is much less affected by instruction-set inertia. This market is typically called the embedded market, and it is characterized by products containing factory-installed software that runs on a microprocessor whose instruction set is not readily evident to the end user. Although the vendor of the product containing the embedded microprocessor has an investment in the embedded software, just like end users with their applications, there is considerably more freedom to migrate embedded software to a new microprocessor with a different instruction set. To overcome this lower level of instruction-set inertia, all it takes is a sufficiently better set of implementation characteristics, particularly absolute performance and/or price-performance.

This lower level of instruction-set inertia gives the vendors of embedded microprocessors the freedom and initiative to seek out new instruction sets. The relative success of RISC microprocessors in the high-end of the embedded market is an example of innovation by microprocessor vendors that produced a benefit large enough to overcome the market’s inertia. To the vendors’ disappointment, the benefits of RISCs have not been sufficient to overcome the instruction-set inertia of the mainstream desktop computer market.

Because of advances in IC...

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