Notes

B. OLSON
ECE 407
Homework 1

Transistor sizing

For this homework unless told otherwise refer to the AMI .5um process handout.
Assume that VTP = -.94V and VTN = .79V. Assume that all transistors are biased in saturation.

Determine the W/L ratio needed to bias an NMOS transistor with 50uA of current with Vdsat = .2V. Determine Vg if Vs = 0.

[pic]

Determine the W/L ratio needed to bias a PMOS transistor with 50uA of current with Vdsat = .2V. Determine Vg if Vs = 3.3V

[pic]

For the circuits shown assume an N-well process with the substrate connected to ground. Determine if there is body effect. If there is body effect and it is possible to remove. Show the circuit that would eliminate body effect.

a) [pic] b) [pic] c) [pic]

Large Signal Behavior

For the circuit shown you may neglect body effect and channel length modulation and express your answers in terms of VTP and Vdsat.

a) Determine Vdc

Vsg = Vdsat - VTP Vdc = Vdd - |VTP| - Vdsat OR Vdc = Vdd + VTP - Vdsat

b) Determine the range of voltages for Vx that would cause the transistor to remain in saturation.

For saturation a) Vsg ( -VTP b) Vsd ( Vsg + VTP OR Vsd ( Vdsat

For this circuit a) Vdd – Vdc ( -VTP b) Vdd - Vx ( Vdsat ( answer: Vx ( Vdd-Vdsat

For the circuit shown you may neglect body effect and channel length modulation and express your answers in terms of VTN.

a) Determine the range of voltages for Vx that would cause the transistor to remain in saturation. Assume that Idc (0.

For saturation: a) Vgs ( VTN and b) Vds(Vdsat also ID=Kn/2(Vgs - VTN)2 ID(0 only if Vgs>VTN

For saturation when ID(0 a)Vgs > VTN and b) Vds(Vdsat

For this circuit: a)(Vdd – Vx) > VTN ( Vx < Vdd-VTN b) (Vdd-Vx) ( (Vdd-Vx-VTN) always true

answer: Vx < Vdd-VTN