Sem 7 Electronics Syllabus

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  • Topic: Digital signal processing, Finite impulse response, Digital filter
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UNIVERSITY OF MUMBAI SCHEME OF INSTRUCTION AND EVALUATION (R2007) Programme: B.E. (ELECTRONICS ENGINEERING) SEMESTER: VII Sr. No Subjects VLSI Design Filter Design Power Electronics and Drives No. of periods of 1Hour Duration of Theory Theory Paper in Lecture Practical Paper Hours 4 100 2 3 4 100 2 3 4 4 Marks Term Work Oral Total

1 2 3 4

25 25 25 25

25 25 25 25

150 150 150 150

2 2

3 3

100 100

Communication Networks
Elective-II 1. Wireless communication 2. Advances in Biomedical Instrumentation 3. Micro computer system design 4. Digital Image Processing Design Project -I

5

4

2

3

100

25

25

150

6

4
20 14

25 15 500
150

25 150

50 800

TOTAL SEMESTER: VIII

No. of periods of 1Hour Sr. No Subjects Advance VLSI Design Lecture 4 4 4 Practical

Duration of Theory Theory Paper in Paper Hours

Marks Term Work Oral Total

1 2 3

2 2 2

3 3 3

100 100 100

25 25 25

25 25 25

150 150 150

Robotics and Automation
Embedded Systems and RealTime Programming Elective-III 1. Advanced Networking Technologies 2. DSP Processors and architectures 3. Neural Networks & Fuzzy Systems 4. Electronics Product Design Project -II

4

4

2

3

100

25

25

150

5

TOTAL

16

8 16

-12

50 400
150

100 200

150 750

University of Mumbai CLASS: B.E. (Electronics Engineering) Semester - VII SUBJECT: VLSI Design Periods per week (each of 60 min.) Evaluation System

Lecture 04 Practical 02 Tutorial Hours Theory Examination 3 Practical examination Oral Examination Term Work Total

Marks 100 25 25 150

Module Objective

Contents To familiarize students with the different aspects of the VLSI field and to introduce important concepts that have industry value Digital System Design I and II, BEC Evolution of logical complexity in ICs as a function of time, VLSI design flow, Y-chart representation, design hierarchy/design abstraction levels in digital circuits, concepts of regularity, modularity and locality, Semi-custom & full custom devices MOS capacitor, energy band diagrams, band bending, flat band voltage, threshold voltage calculation, threshold adjustment, MOSFET linear and saturated operation(GCA), MOSFET capacitance, channel length modulation. Types of scaling, functional limitations of scaling, short channel, narrow channel effects, hot electron effects. Wafer processing, mask generation, oxidation, epitaxy, ion implantation, diffusion, metallization, photolithography, process steps for NMOS & PMOS devices, CMOS inverters, latch-up in CMOS and its prevention. Process simulation using CAD tools Video of manufacturing process to be shown.

Hours -

Pre-requisite 1. Introduction to VLSI

03

2. Physics of MOSFET

13

3. Semiconductor manufacturing process

03

4.Design rules and layout

5.MOS Inverters

6. Verilog

Need of design rules, NMOS, PMOS and CMOS design rules and layouts. Design of NMOS and CMOS Inverter, NAND and NOR gates. Interlayer contacts, Butting and Buried contacts. Stick diagrams, layout of integrated circuits. Realization of Boolean expressions in CMOS. Use of CAD tools for layout design and simulation. MOS inverters - resistive load - NMOS load pseudo NMOS (Qualitative) and CMOS inverters (quantitative) -calculation of noise margin, calculation of rise, fall and delay times for CMOS inverter, transistor sizing and power dissipation , series and parallel equivalency rules, equivalent inverter (numericals on noise margin calculations, timing calculations, power dissipation, equivalency expected) Basic concepts, structural gate level, switch level, behavior and RTL modeling. Arithmetic Circuits in CMOS VLSI – carry look ahead adder, high speed adders, subtractors, decoders, multiplexer and multipliers. Sequential circuits’ implementation using verilog (Flip-Flop, registers and counters, state machines).

10

12

07

Text Books: 1. Sung-Mo Kang & Yusuf Leblebici, CMOS Digital...
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