A pipeline allows multiple instructions to be processed at the same time. While one stage of an instruction is being processed, other instructions may be undergoing processing at a different stage. Without a pipeline, each instruction would have to wait for the previous one to finish before it could even be accessed. Pipelining is a key implementation technique used to build fast processors. It allows the execution of multiple instructions to overlap in time. Pipelining is an implementation technique where multiple instructions are overlapped in execution. The computer pipeline is divided in stages. Each stage completes a part of an instruction in parallel. The stages are connected one to the next to form a pipe - instructions enter at one end, progress through the stages, and exit at the other end. A Pipeline is a series of stages, where some work is done at each stage. The work is not finished until it has passed through all stages. Pipelining is the key to making processors fast&. A pipeline processor is comprised of a sequential, linear list of segments, where each segment performs one computational task or group of tasks Pipelining is concerned with the following tasks:
Use multi-cycle methodologies to reduce the amount of computation in a single cycle. Shorter computations per cycle allow for faster clock cycles. Overlapping instructions allows all components of a processor to be operating on a different instruction. Throughput is increased by having instructions complete more frequently. 1.1 TYPES OF PIPELINES Linear Pipelines.
Single Function Pipelines.
CHAPTER 2: CLASSIFICATION OF PIPELINE PROCESSORS
There are various kinds of pipeline processors which are classified as follows: 2.1 ARITHMETIC PIPELINE:
The arithmetic logic units of a computer can be segmentized for pipeline operations in various data formats. Well-known arithmetic pipeline examples are the four-stage pipes used in Star-100, the eight-stage pipes used in the TI-ASC, the up to 14 pipelines stages used in the Cray-1, and up to 26 stages per pipe in the Cyber-205. The concept of arithmetic pipeline is as shown in figure 2.1.
FIGURE 2.1: Arithmetic pipelining
The execution of a stream of instruction can be pipelined by overlapping the execution of the current instruction with the fetch, decode, and operand fetch of subsequent instruction. This technique is also known as instruction look ahead. Almost all high-performance computers are now equipped with instruction-execution pipelines. The concept of instruction pipelining is as shown in the figure 2.2.
FIGURE 2.2: Instruction pipelining
This refers to the pipeline processing of the same data stream by a cascade of processors, each of which processes a specific task. The data stream passes the first processor with results stored in a memory block which is also accessible by the second processor.
FIGURE 2.3: processor pipelining The second processor then passes the refined results to the third, and so on. The pipelining of multiple processors is not yet well accepted as a common practice. The concept of processor pipelining is as shown in the figure 2.3. According to pipeline configurations and control strategies, Ramamooorthy and Li (1977) have proposed the following three pipeline classification schemes: 2.3.1UNIFUNCTION VS. MULTIFUNCTION PIPELINES:
A pipeline unit with a fixed and dedicated function, such as the floating-point adder is called unifunctional. The Cray-1 has 12 unifunctional pipeline units for various scalar, vector, fixed-point, and floating-point operations. A multifunction pipe may perform different subsets of...