lab2_SimpleALU
Fre-E CSE471 - Computer Organization and Design
Semester 2 2012-2013
Danang University of Technology, Faculty of Electronics and Telecommunications
Prepared by Ho Viet Viet, Pham Xuan Trung and Nguyen Van Hieu
Lab2: Design a MIPS 32-bit ALU
Due Date:
Lab Objectives:
For this lab2 you are to design a simple 32-bit MIPS ALU. The ALU functions implemented are Addition, Subtraction, eXclusive OR, and Set on Less Than. Examples of this type of architecture is shown in chapter 4 of the textbook. The overall block diagram of your design will look like the figure below.
Bus A
32
Output
Bus B
32
ALU
32
Zero
Overflow
Carryout
Negative
ALU
2 Control
The ALU has 8 ports. These ports are the two input ports A and B, the output port, ALU control, zero detect output, overflow detect output, negative detect output, and the carryout output. The ALU control line assignments is given below. Please use these inputs to select the ALU function.
ALU CONTROL LINES
FUNCTION
00
Addiitiition
01
XOR
10
Sub
11
Slt
Note:
The Carryout and Overflow flags are very important for Addition and Subtraction. The Carryout flag is set if an unsigned overflow occurs. The Overflow flag is set if a signed overflow occurs.
The Zero and Negative flags are only important for Addition, Subtraction, and XOR. The Zero flag is set if the Output equals zero. The Negative flag is set if the most significant bit of the Output equals one.
What these flags do in the other cases is UP TO YOU.
Computer resources and software tools:
PCs with Software Quartus II, ModelSim, IVerilog installed, testbench: alustim.v
Lab Requirements (as in lab1)
Semester 2 2012-2013
Danang University of Technology, Faculty of Electronics and Telecommunications
Prepared by Ho Viet Viet, Pham Xuan Trung and Nguyen Van Hieu
Lab2: Design a MIPS 32-bit ALU
Due Date:
Lab Objectives:
For this lab2 you are to design a simple 32-bit MIPS ALU. The ALU functions implemented are Addition, Subtraction, eXclusive OR, and Set on Less Than. Examples of this type of architecture is shown in chapter 4 of the textbook. The overall block diagram of your design will look like the figure below.
Bus A
32
Output
Bus B
32
ALU
32
Zero
Overflow
Carryout
Negative
ALU
2 Control
The ALU has 8 ports. These ports are the two input ports A and B, the output port, ALU control, zero detect output, overflow detect output, negative detect output, and the carryout output. The ALU control line assignments is given below. Please use these inputs to select the ALU function.
ALU CONTROL LINES
FUNCTION
00
Addiitiition
01
XOR
10
Sub
11
Slt
Note:
The Carryout and Overflow flags are very important for Addition and Subtraction. The Carryout flag is set if an unsigned overflow occurs. The Overflow flag is set if a signed overflow occurs.
The Zero and Negative flags are only important for Addition, Subtraction, and XOR. The Zero flag is set if the Output equals zero. The Negative flag is set if the most significant bit of the Output equals one.
What these flags do in the other cases is UP TO YOU.
Computer resources and software tools:
PCs with Software Quartus II, ModelSim, IVerilog installed, testbench: alustim.v
Lab Requirements (as in lab1)