Implementation of Advanced Encryption Standard Algorithm
International Journal of Scientific & Engineering Research Volume 3, Issue 3, March -2012 ISSN 2229-5518
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Implementation of Advanced Encryption Standard Algorithm
M.Pitchaiah, Philemon Daniel, Praveen
Abstract—Cryptography is the study of mathematical techniques related to aspects of information security such as confidentiality, data integrity, entity authentication and data origin authentication. In data and telecommunications, cryptography is necessary when communicating over any unreliable medium, which includes any network particularly the internet. In this paper, a 128 bit AES encryption and Decryption by using Rijndael algorithm (Advanced Encryption Standard algorithm) is been made into a synthesizable using Verilog code which can be easily implemented on to FPGA. The algorithm is composed of three main parts: cipher, inverse cipher and Key Expansion. Cipher converts data to an unintelligible form called plaintext. Key Expansion generates a Key schedule that is used in cipher and inverse cipher procedure. Cipher and inverse cipher are composed of special number of rounds. For the AES algorithm, the number of rounds to be performed during the execution of the algorithm uses a round function that is composed of four different byte-oriented transformations: Sub Bytes, Shift Rows, Mix columns and Add Round Key. Index Terms—Advanced Encryption Standard, Cryptography, Decryption, Encryption.
I. INTRODUCTION
THE Cryptography plays an important role in the security of data transmission [1]. This paper addresses efficient hardware implementation of the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing of Rijndael algorithm [3]. A strong focus is placed on high throughput implementations, which are required to support security for current and future high bandwidth applications [5][6][7][8][9]. This implementation will be useful in wireless security like military communication and mobile telephony where there is a
1
Implementation of Advanced Encryption Standard Algorithm
M.Pitchaiah, Philemon Daniel, Praveen
Abstract—Cryptography is the study of mathematical techniques related to aspects of information security such as confidentiality, data integrity, entity authentication and data origin authentication. In data and telecommunications, cryptography is necessary when communicating over any unreliable medium, which includes any network particularly the internet. In this paper, a 128 bit AES encryption and Decryption by using Rijndael algorithm (Advanced Encryption Standard algorithm) is been made into a synthesizable using Verilog code which can be easily implemented on to FPGA. The algorithm is composed of three main parts: cipher, inverse cipher and Key Expansion. Cipher converts data to an unintelligible form called plaintext. Key Expansion generates a Key schedule that is used in cipher and inverse cipher procedure. Cipher and inverse cipher are composed of special number of rounds. For the AES algorithm, the number of rounds to be performed during the execution of the algorithm uses a round function that is composed of four different byte-oriented transformations: Sub Bytes, Shift Rows, Mix columns and Add Round Key. Index Terms—Advanced Encryption Standard, Cryptography, Decryption, Encryption.
I. INTRODUCTION
THE Cryptography plays an important role in the security of data transmission [1]. This paper addresses efficient hardware implementation of the AES (Advanced Encryption Standard) algorithm and describes the design and performance testing of Rijndael algorithm [3]. A strong focus is placed on high throughput implementations, which are required to support security for current and future high bandwidth applications [5][6][7][8][9]. This implementation will be useful in wireless security like military communication and mobile telephony where there is a