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ISSCC 2009 / SESSION 20 / SENSORS AND MEMS / 20.6
20.6 A Compact CMOS MEMS Microphone with 66dB SNR
MOS model). The optimal M1,2 width (W) is determined for several M1,2 lengths (L) and bias current Ibias, and the overall optimal set of values is W=600µm, L=3µm, Ibias=53µA. Noise measurements show that 1/f noise has a slightly higher impact than does white noise, when both contributions are A-weighted. The expected SNR degradation introduced by the amplifier is lower than 1.5dB for Vb=±10V. The amplifier consumes 120µA at 1.8V. The amplifier differential output voltage for an SPL of 94dB (i.e., 1Pa) and Vb=±10V at 1kHz is 21mVrms with an amplifier gain of 8dB, resulting in a twomicrophone sensitivity of 8.4mVrms/Pa. The frequency response under the same conditions is measured with a TBS50 pyramid testbox, with frequency range of 60Hz to 9kHz, and is shown in Fig. 20.6.2. The transfer function is expected to be flat until at least 20kHz. A plot of the THD as a function of the SPL at 1kHz is shown in Fig. 20.6.3. No significant distortion due to the FA is observed, and the THD is below 1% for an SPL below 112dB. Increasing |Vb| increases the microphone sensitivity, resulting in higher microphone output voltages, as shown in Fig. 20.6.4 (top). However, if Vb reaches ~12.2V, the microphone collapses, with the membrane sticking to the bottom plate. Functionality can be restored by discharging the microphone to 0V. The A-weighted 20Hz-to-20kHz rms differential output noise is shown in Fig. 20.6.4 (bottom). At low Vb values, noise almost totally comes from the amplifier (5µVrms), while at higher Vb values the microphone noise becomes dominant. For the nominal condition Vb=10V, the SNR deterioration caused by the amplifier is ~1.0dB. An SNR vs. Vb plot is shown in Fig. 20.6.5, where an SNR of 66.5dB is achieved at Vb=10V (the SNR drops by only ~1dB at a more conservative Vb of 8.5V). The same figure shows that using only one microphone reduces the SNR by 3-4dB, as expected. Figure 20.6.6 presents a comparison with other MEMS microphone products with data from available data sheets, showing that this work achieves an SNR improvement of several dB. Photographs of CMOS amplifier and MEMS microphones are displayed in Fig. 20.6.7. Contacts between the microphones and amplifier are provided, with negligible parasitic capacitance, through connections on the silicon substrate on which both microphones and amplifier are flipchip mounted. The amplifier die size is 3.2×0.93mm2, the membrane diameter of the microphones is 1.05mm, and the volume of the complete chip-scale package (CSP) is 2.6×3.2×0.865mm3. This size is chosen to allow the use of a pair of silicon substrate dies already employed in a commercially available digital microphone CSP (with dimensions 2.6×1.6×0.865mm3, using a single MEMS microphone and a single substrate die) without redesign. Due to compact packaging, the new microphone CSP occupies less area than the products from Figure 20.6.6, despite the use of two MEMS microphones. Acknowledgements: We are grateful to Claus Plougmann and Mihalis Kampanis for assembling the test samples, to Rene G. Pedersen for the test PCBs layout, and to Jonas V. Nielsen for discussions about the system assembly. All are with Pulse MEMS. References:  P.V. Loeppert and S.B. Lee, “SiSonicTM - The First Commercialized MEMS Microphone,” Solid-State Sensors, Actuators and Microsystems Workshop, pp. 27-30, 2006.  P.R. Scheeper, “A Silicon Condenser Microphone: Materials and Technology,” Ph.D. Thesis, University of Twente, 1993.  A. Van Halteren, “Microphone with Dual Transducers”, Patent application US 2008/0192962 A1, filed Feb. 12, 2008.  Pulse, “SiMicTM Analog Silicon Microphone,” version 2.1, July 2008, accessed Dec. 15, 2008, .  Akustica, “AKU2000 Digital Output Microphone Product Brief PB1-1.0,” accessed Oct. 25, 2008, .  Infineon, “SMM310 Silicon MEMS Microphone,” May...
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