Gate: X86 and Accumulator

BAPATLA ENGINEERING COLLEGE :: BAPATLA
DEPARTMENT OF ECE

GATE – 2010

MICROPROCESSORS AND INTERFACING

Faculty: Sri A.M.V.N.Maruthi

1) The width of address bus and data bus in 8085 are respectively…

a) 16,8 b)8,16

c) 8,8 d) 16,16

2) The number of status flags in 8085 are

a) 5 b) 6

c)9 d)8

3) The status that cannot be operated by direct instructions is

a) Cy b) Z

c) P d) AC

4) The number of software interrupts in 8085 is…

a) 5 b) 8

c) 9 d) 10

5) Identify the non maskabe interrupt in the following

a) RST4.5 b) RST5.5

c) RST6.5 d) RST 7.5

6) If the contents of SP are 1000H, the content of B and C registers after PUSH B instruction

are...

a)0FFFH, OFFEH b) 0FFE H ,0FFF H

c) 1000 H,0FFF H d) 1000 H, 1001H

7) In an 8085 system, let SP=20000 H. Then after execution of POP H instruction will transfer the memory contents as…

a) 2001H and 2002H to H and L register b) 2001H and 2000H in to H and L registers

c) 2000H and 1FFFH to H and L registers d) 2000H and 1999H to H and L registers

8) In response to RST 7.5 interrupt, the execution of control transfers to memory location...

a) 0000H b) 002CH

c)0034H d) 003CH

9) Let contents of accumulator and B are 00000100 and 01000000 respectively. After

execution of SUB B instruction, accumulator contents are….

a) 00000100 b) 01000000

c) 11000100 d) 010001000

10) Let the contents of C register be 00000000. The contents of C register after execution of

DCR C is..

a) 00000000 b) 11111111

c) 00000001 d) none of above

11) In an 8085 based system, the maximum number of input output devices can be connected