Flip Flop Logic

Topics: Input, Logic gate, Cybernetics Pages: 4 (880 words) Published: March 19, 2012
INTRODUCTION
Digital electronics is classified into combinational logic and sequential logic. Combinational logic output depends on the inputs levels, whereas sequential logic output depends on stored levels and also the input levels. A sequential circuit is specified by a time sequence of inputs, outputs, and internal states.

There are two types of sequential circuits. Their classification depends on the timing of their signals: * Synchronous sequential circuits - This type of system uses storage elements called flip-flops that are employed to change their binary value only at discrete instants of time. Sequential circuits have a clock signal as one of their inputs. All state transitions in such circuits occur only when the clock value is either 0 or 1 or happen at the rising or falling edges of the clock depending on the type of memory elements used in the circuit.  * Asynchronous sequential circuits - This is a system whose outputs depend upon the order in which its input variables change and can be affected at any instant of time. Sequential Circuit Memory Elements: Latches, Flip-Flops

Latches and flip-flops are the basic single-bit memory elements used to build sequential circuit with one or two inputs/outputs, designed using individual logic gates and feedback loops: Latches – The output of a latch depends on its current inputs and on its previous inputs and its change of state can happen at any time when its inputs change. RS latch

RS latch have two inputs, S and R. S is called set and R is called reset. The S input is used to produce HIGH on Q ( i.e. store binary 1 in flip-flop). The R input is used to produce LOW on Q (i.e. store binary 0 in flip-flop). Q' is Q complementary output, so it always holds the opposite value of Q. The output of the S-R latch depends on current as well as previous inputs or state, and its state (value stored) can change as soon as its inputs change.

RS latch using NAND gates
NAND is NOR gate dual form...
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