Over the next five years, an incredible 3x wafer growth is expected for the Flip-Chip platform, which will reach 40M+ of 12’’eq wspy by 2018!
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Despite its high 19% CAGR, Flip-chip is not new — in fact, it was first introduced by IBM over 30 years ago! As such, it would be easy to consider it an old, uninteresting, mature technology…but this is far from true! Instead, Flip-Chip is keeping up with the times and developing new bumping solutions to serve the most advanced technologies, like 3DIC and 2.5D. Indeed, no matter what packaging technology you’re using, a bumping step is always required at the end!
In 2012, bumping technologies accounted for 81% of the total installed capacity in the middle-end area. That’s big. Really big. So big that it represents 14M+ 12’’eq wafers (2012 installed capacity: see figure below) — and fab loading rates are high as well, especially for the Cu pillar platform (88%). Flip-Chip is also big on value: in 2012 it was a $20B market (making it the biggest market in the middle-end area), and we expect it to continue growing at an 9% clip, ultimately reaching $35B by 2018!
Flip-Chip capacity is expected to grow over the next five years to meet large demand from three main areas: 1) CMOS 28nm IC, including new applications like APE and BB; 2) The next generation of DDR Memory;
3) 3DIC/2.5D Interposer using µbumping. Driven by these applications, Cu pillar is on its way to becoming the interconnect of choice for Flip-Chip.
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- Fully updated 2010 – 2018 market forecast and bottom-up approach, including micro-bumping for 3DIC! - 2012 installed capacity
- Comparison between C2 and TCB
- Strong focus on micro-bumping for 3DIC & 2.5D
- Market share/data for Flip-Chip bonder
- Detailed technology roadmap
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