ENERGY RECOVERY IN STATIC RAM MEMORY CORE
ENERGY RECOVERY IN STATIC RAM MEMORY CORE
- Kirti Pande
TABLE OF CONTENTS
TOPIC NAME PAGE NUMBER
A] INTRODUCTION 5
B] SRAM ORGANIZATION 6
C] ENERGY CONSUMPTION 18
D] ADIABATIC SWITCHING 22
E] ENERGY RECOVERY TECHNIQUES 25
F] CONCLUSION 44
G] REFERENCES & BIBLIOGRAPHY 45
A] Introduction
Power dissipation in CMOS Circuits occurs due to dissipative charge and discharge of gate, junction and wire capacitances through resistive MOSFET switches. Ultra low energy operation is possible if the charge and discharge of capacitances is carried out in an adiabatic manner. Recovered energy logic circuits accomplish this by charging and discharging circuit capacitances slowly so that the voltage across ON MOSFET switches is small and by switching on MOSFETs only when the potential difference across them is close to zero. By recovering the energy stored in circuit capacitances during the discharge process, recovered energy logic circuits have demonstrated the possibility of achieving energy savings as high as possible(around 99%).
Today VLSI systems integrate both random logic and asserted memories. Hence it is natural to apply the principles of energy recovery to memories to achieve similar large savings in energy as in random logic. However the application of such methods should not cause drastic increase in either the size or complexity of the memory core.
B] SRAM ORGANIZATION
There are two types of Random Access Memory or RAM, each has its own advantages and disadvantages compared to the other. SRAM (Static RAM) and DRAM (Dynamic RAM) holds data but in a different ways. DRAM requires the data to be refreshed periodically in order to retain the data. SRAM uses bistable latching circuitry to store each bit SRAM does not need to be refreshed as the transistors inside would continue to hold the
- Kirti Pande
TABLE OF CONTENTS
TOPIC NAME PAGE NUMBER
A] INTRODUCTION 5
B] SRAM ORGANIZATION 6
C] ENERGY CONSUMPTION 18
D] ADIABATIC SWITCHING 22
E] ENERGY RECOVERY TECHNIQUES 25
F] CONCLUSION 44
G] REFERENCES & BIBLIOGRAPHY 45
A] Introduction
Power dissipation in CMOS Circuits occurs due to dissipative charge and discharge of gate, junction and wire capacitances through resistive MOSFET switches. Ultra low energy operation is possible if the charge and discharge of capacitances is carried out in an adiabatic manner. Recovered energy logic circuits accomplish this by charging and discharging circuit capacitances slowly so that the voltage across ON MOSFET switches is small and by switching on MOSFETs only when the potential difference across them is close to zero. By recovering the energy stored in circuit capacitances during the discharge process, recovered energy logic circuits have demonstrated the possibility of achieving energy savings as high as possible(around 99%).
Today VLSI systems integrate both random logic and asserted memories. Hence it is natural to apply the principles of energy recovery to memories to achieve similar large savings in energy as in random logic. However the application of such methods should not cause drastic increase in either the size or complexity of the memory core.
B] SRAM ORGANIZATION
There are two types of Random Access Memory or RAM, each has its own advantages and disadvantages compared to the other. SRAM (Static RAM) and DRAM (Dynamic RAM) holds data but in a different ways. DRAM requires the data to be refreshed periodically in order to retain the data. SRAM uses bistable latching circuitry to store each bit SRAM does not need to be refreshed as the transistors inside would continue to hold the