Design of 4-Bit Cpu

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Designing a 4-bit Computer|
For submission to Mr. Manoj Ghimire|
|
|
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Kishor Adhikari(063bex416) Priya Agrawal(063bex425) Sanuj Shakya(063bex433)| 5/11/2010|
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Contents
Introduction2
Initial Block Diagram2
Instructions to be Implemented3
Decoder section4
Timing Section5
Bus Control5
4 bit ALU AND COMPLEMENTER6
Executions6
Control Logic10

Introduction

A computer design is the hardware design procedure of a computer on the basis of the specifications required i.e. the instructions to be supported by the computer. It includes the determination of what hardware should be used and how the parts must be interconnected for the computer to operate as intended.

This report contains a brief discussion on the design procedure of a very basic computer organization. The design has been completed as an assignment for the course Computer Architecture and Design and has been submitted to our lecturer Manoj Ghimire.

The design procedure is as follows.

Initial Block Diagram

Let us consider a block diagram for a 4 bit computer as shown below. It will have four registers A, B, C and D, an input register, an output register, two temporary registers X and Y, carry bit register E, an ALU and a bus, all of 4 bits(except E which is of a single bit). It will also contain Bus Control, Control Logic and a Sequence Counter (SC). Sequence Counter

Register1 (A)
Register2 (B)
Register3 (C)
Register4 (D)
OUTR
INPR
Bus Control
ALU
X
Y
Control Logic
IR
Ex
Control Signals
Inputs
T0
T3
E

Fig. 1: Block Diagram for Design Initialization
Instructions to be Implemented
1.
2. Input to A,B,C,D :
LDA, LDB, LDC, LDD
3. Move to A :
a. MOV A, B
b. MOV A, C
c. MOV A, D
4. Move to B:
d. MOV B, A
e. MOV B, C
f. MOV B, D
5. Move to C :
g. MOV C, A
h. MOV C, B
i. MOV C, D
6. Move to D :
j. MOV D, A
k. MOV D, B
l. MOV D, C
7. Add to A :
m. ADD A, B
n. ADD A, C
o. ADD A, D
8. Add to B :
p. ADD B, A
q. ADD B, C
r. ADD B, D
9. Add to C :
s. ADD C, A
t. ADD C, B
u. ADD C, D
10. Add to D :
v. ADD D, A
w. ADD D, B
x. ADD D, C
11. Add to A with carry :
y. ADC A, B
z. ADC A, C
{. ADC A, D
12. Add to B with carry :
|. ADC B, A
}. ADC B, C
~. ADC B, D
13. Add to C with carry :
. ADC C, A
�. ADC C, B
�. ADC C, D
14. Add to D with carry :
�. ADC D, A
�. ADC D, B
�. ADC D, C
15. Subtract from A :
�. SUB A,B
�. SUB A,C
�. SUB A,D
16. Subtract from B :
�. SUB B,A
�. SUB B,C
�. SUB B,D
17. Subtract from C :
�. SUB C,A
�. SUB C,B
�. SUB C,D
18. Subtract from D :
�. SUB D,A
�. SUB D,B
�. SUB D,C
19. Subtract from A with borrow :
�. SBB A,B
�. SBB A,C
�. SBB A,D
20. Subtract from B with borrow :
�. SBB B,A
�. SBB B,C
�. SBB B,D
21. Subtract from C with borrow :
�. SBB C,A
�. SBB C,B
�. SBB C,D

22. Subtract from D with borrow :
�. SBB D,A
�. SBB D,B
�. SBB D,C

23. Add Immediate data :
ADI A, ADI B, ADI C, ADI D

24. Add Immediate data with carry :
ACI A, ACI B, ACI C, ACI D

25. Subtract Immediate data from :
SUI A, SUI B, SUI C, SUI D

26. Subtract with borrow Immediate data from :
SBI A, SBI B, SBI C, SBI D

27. Increase :
INC A, INC B, INC C, INC D

28. Decrease :
DCR A, DCR B, DCR C, DCR D

29. Complement :
CMP A, CMP B, CMP C, CMP D

30. Out :
OUT A, OUT B, OUT C, OUT D

31. No operation : NOP

Decoder section
Since we have a total of 30 different types of operations, we require a minimum of 5...
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