Counter and Shift Register: Project

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  • Topic: Counter, Shift register, Flip-flop
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nanyang technological universityschool of elecrical & electronic engineering| EE2072 Laboratory 2B|
Experiment No. L225COUNTER AND SHIFT REGISTERProject Laboratory(S2-B4a-01/02)Name: Bai ShuoyangGroup: LA05Date: 1/4/2013| 1. Introduction
2.1 Background
A register are important digital building blocks that are used to accept, store, and transfer information. Registers are widely used in CPUs and other digital processors. Due to the high speed of accessing and writing, registers are often at the top of the memory hierarchy. There are various types of registers that are used for different purposes. A data register has the function of storing numeric values, characters, arrays and other types of data. Besides the data register, conditional registers, address registers, floating point registers, binary registers and some other registers form the big family of registers.

Figure 1.1 Internal structure of a CPU
A shift register is one form of sequential logic that consists of a series of flip flops connecting in cascade. Normally all the flip flops are synchronized by a common clock signal. When a digital signal or waveform is inputted into the shift register, the output will be delayed or “shifted”. Shift registers can be classified to several types: serial in – serial out, parallel in – serial out, serial in – parallel out, and universal parallel in – parallel out. For this experiment, parallel in – serial out and serial in – serial out configurations will be analyzed. A counter is a frequently used device that can record the number of certain events within a specified period of time. Like registers, there are also different kinds of counters such as ripple (asynchronous) counters, synchronous counters, ring counters, decade counters, frequency counters and so on. In the second part of this experiment, ring counters will be analyzed. 2.2 Theory

2.3.1 8-bit parallel in – serial out shift register The parallel in – serial out shift register used in this experiment contains 8 bit which implies that it is comprised of eight flip flops. In this experiment, the parallel in – serial out configuration is achieved by using the TTL 74166 IC which is an 8-bit serial/parallel input – serial output shift register. It can function as both serial in –serial out and parallel in- serial out configuration. It has a complexity of 77 equivalent gates with gated clock inputs and an overriding clear input. The schematic diagram of TTL 74166 is shown below:

Figure 1.2 Schematic diagram of SN74LS166
The parallel-in or serial-in mode is established by the SHIFT/LOAD input. When the SHIFT/LOAD input is high, the serial data input is enabled and the eight flip-flops are coupled for serial shifting with each clock pulse. The data will be transferred into the first flip-flop of the register through serial input one bit at a time. If the data is already inside the register, the data will shift to the right simultaneously when there is a clock edge. When the SHIFT/LOAD input is low, the parallel data input is activated and all the bits will be loaded into the register. The block diagram of 74166 is shown below:

Figure 1.3 Block diagram of SN74LS166
For this experiment, both parallel in and serial in modes are used because the data needs to be loaded into the register first and shifts out through QH bit by bit.

2.3.2 2-bit serial in – serial out shift register The serial in – serial out configuration used in this experiment is achieved with 7476 JK flip flops which consists of one master and one slave JK flip flop. When there is a positive edge, the input is loaded into the master flip flop. After that, it passes the data to the slave flip flop when the clock signal has a high-to-low transition. The preset and clear are active low inputs that override the clock signal and the data input when they are low. The function table is shown below:

Table 1.1 Function table of SN74LS76...
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