Architecture and Application: A Field-Programmable Gate Array

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  • Topic: Logic gate, Field-programmable gate array, Programmable logic device
  • Pages : 28 (8175 words )
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  • Published : January 15, 2012
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FPGAs

ABSTRACT
This report provides a survey of architectures of commercially available highcapacity field-programmable logic devices (FPLDs) ex. FPGAs and also the applications of FPGAs. We first define the relevant terminology in the field and then describe the recent evolution of FPLDs. The three main categories of FPLDs are delineated: Simple PLDs (SPLDs), Complex PLDs (CPLDs) and Field-Programmable Gate Arrays (FPGAs). The details of the architectures of the most important commercially available FPGAs are given.

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FPGAs

CHAPTER 1 INTRODUCTION TO HIGH CAPACITY FPLDs
Prompted by the development of new types of sophisticated field-programmable logic devices (FPLDs), the process of designing digital hardware has changed dramatically over the past few years. Unlike previous generations of technology, in which board-level designs included large numbers of SSI chips containing basic gates, virtually every digital design produced today consists mostly of high-density devices. This applies not only to custom devices like processors and memory, but also for logic circuits such as state machine controllers, counters, registers, and decoders. When such circuits are destined for high-volume systems, they have been integrated into high-density gate arrays. However, gate array NRE costs often are too expensive and gate arrays take too long to manufacture to be viable for prototyping or other low-volume scenarios. For these reasons, most prototypes, and also many production designs are now built using FPLDs. The most compelling advantages of FPLDs are instant manufacturing turnaround, low start-up costs, low financial risk and (since programming is done by the end user) ease of design changes. The market for FPLDs has grown dramatically over the past decade to the point where there is now a wide assortment of devices to choose from. A designer today faces a daunting task to research the different types of chips, understand what they can best be used for, choose a particular manufacturer’s product, learn the intricacies of vendor-specific software and then design the hardware. Not only not only the sheer number of FPLDs available exacerbates confusion for designers, but also by the complexity of the more sophisticated devices. The purpose of this paper is to provide an overview of the architecture of the various types of FPLDs. The emphasis is on devices with relatively high logic capacity; all of the most important commercial products are discussed. Before proceeding, we provide definitions of the terminology in this field. This is necessary because the technical jargon has become somewhat inconsistent over the past few years as companies have attempted to compare and contrast their products in literature.

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FPGAs

1.1 Definitions of Relevant Terminology
The most important terminology used in this report is defined below. • Field-Programmable Logic Device (FLPD) — a general term that refers to any type of integrated circuit used for implementing digital hardware, where the chip can be configured by the end user to realize different designs. Programming of such a device often involves placing the chip into a special programming unit, but some chips can also be configured “in-system”. Another name for FPLDs is programmable logic devices (PLDs); although PLDs encompass the same types of chips as FPLDs, we prefer the term FPD because historically the word PLD has referred to relatively simple types of devices.

• PLA — a Programmable Logic Array (PLA) is a relatively small FPLD that contains two levels of logic, an AND-plane and an OR-plane, where both levels are programmable (note: although PLA structures are sometimes embedded into full-custom chips, we refer here only to those PLAs that are provided as separate integrated circuits and are userprogrammable).

• PAL—a Programmable Array Logic (PAL) is a relatively small FPLD that has a programmable AND-plane followed by a fixed OR-plane.

• SPLD — refers to...
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