Signal Integrity

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  • Topic: Digital signal processing, Printed circuit board, Ground plane
  • Pages : 11 (2931 words )
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  • Published : January 3, 2013
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Signal Integrity Considerations for High Speed Digital Hardware Design White Paper Issue: 01, 11th November 2002 Mick Grant, Design Engineer

Abstract As system clock frequencies and rise times increase, signal integrity design considerations are becoming ever more important. Unfortunately many Digital Designers may not recognise the importance of signal integrity issues and problems may not be identified until it is too late. This paper presents the most common design issues affecting signal integrity in high-speed digital hardware design. These include impedance control, terminations, ground/power planes, signal routing and crosstalk. Armed with the knowledge presented here, a digital designer will be able to recognise potential signal integrity problems at the earliest design stage. Also, the designer will be able to apply techniques presented in this paper to prevent these issues affecting the performance of their design.

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Introduction
Despite the fact that Signal Integrity (SI) is among the most fundamental of design practices for hardware engineers, the digital design community has long ignored it. Through the age of low-speed logic, designing for SI was considered wasted effort, as the probability of SI-related issues was low. However as clock rates and rise times increased through the years, the need for SI analysis and design also increased. Unfortunately many designers have not heeded the call and still neglect to consider SI in their designs. Modern digital circuits can operate up to gigahertz frequencies with rise times in the order of fifty picoseconds. At these speeds, a carelessly designed PCB trace only needs to be an inch or so long before it radiates. Radiating traces create voltage, timing and interference problems not only on that line, but also across the entire board and even across adjacent boards. The problem is even more critical with mixed-signal circuits. For example, consider a system that relies upon a high-performance ADC to digitize received analog signals. The energy on the digital outputs of the ADC could easily be 130dB (10,000,000,000,000 times) more the energy on the analog input. Any noise on the digital side of the ADC could annihilate the low-level analog signal so preventing noise leakage is critical. Designing for SI need not be an arduous process. The key to designing for SI is to recognise potential problems as early in the design stage and prevent them from causing problems later. This paper outlines some key SI challenges and discusses some steps to address them.

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Author Mick Grant

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Ensuring Signal Integrity
Isolation
Components on a PCB operate a variety of edge rates and have varying levels of tolerance to noise. The most straightforward method for improving SI is to physically isolate components on the PCB according to their edge rates and sensitivity. An example is shown in Figure 1. In this example, the power supply, digital I/O and highspeed logic are considered to be high-threat circuits to the sensitive clock and data converter circuits.

Figure 1: Isolation of Functional Blocks on a PCB The first layout in Figure 1 places the clocks and data converters adjacent to noisy components. Noise will be coupled into the sensitive circuits and their performance will be compromised. The second layout is much better as the sensitive circuits are physically isolated from the power supply, high-speed logic and digital I/O.

Document Number CAL-000002-WP-01

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Author Mick Grant

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Impedance, Reflections and Termination
Impedance control and terminations are fundamental design issues at high-speeds. This is a fact at the heart of every RF design. However some digital circuits operating at frequencies even higher than RF neglect to consider impedance and terminations in their design. Impedance mismatches produce several detrimental effects in digital circuits as shown in Figure 2: • Digital...
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