Risc Sisc

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RISC and CISC

What is RISC
RISC, or Reduced Instruction Set Computer. is a type of
microprocessor architecture that utilizes a small, highlyoptimized set of instructions, rather than a more specialized set of instructions often found in other types of architectures. Every instruction in a single clock after fetch and decode.

Smaller, less energy consumption.
Sun Sparc, IBM Power series both have RISC
RISC allows branch prediction and Pipelining because they
require fixed length instructions.

What is RISC?
RISC?
RISC, or Reduced Instruction Set Computer. is a type
of microprocessor architecture that utilizes a
small, highly-optimized set of instructions, rather
than
than a more specialized set of instructions often
found in other types of architectures.

History
History
The first RISC projects came from IBM, Stanford, and UC-Berkeley in the late 70s and early 80s.
The IBM 801, Stanford MIPS, and Berkeley were all designed with a similar philosophy which has become known as RISC.
Certain design features have been characteristic of most RISC processors:

one cycle execution time: RISC processors have a CPI (clock per instruction) of one cycle. This is due to the optimization of each instruction on the CPU and a technique called PIPELINING
pipelining: a technique that allows for simultaneous execution of parts, or stages, of instructions to more efficiently process instructions;
large number of registers: the RISC design philosophy generally incorporates a larger number of registers to prevent in large amounts of interactions with memory

RISC Attributes
The main characteristics of CISC microprocessors are:
Extensive instructions.
Complex and efficient machine instructions.
Microencoding of the machine instructions.
Extensive addressing capabilities for memory operations.
Relatively few registers.
In comparison, RISC processors are more or less the opposite of the above:
Reduced instruction set.
Less complex, simple instructions.
Hardwired control unit and machine instructions.
Few addressing schemes for memory operands with only two basic instructions, LOAD and STORE
Many symmetric registers which are organised into a register file.

Features of RISC
Simple instruction set
Fixed length instructions
Single machine cycle instructions
Pipelining
Very few addressing modes
Large number of registers to prevent large interactions with memory.
Microcoding or microprogramming not required so
instructions can be hardwired.
Load and Store architecture for memory

What is CISC?
Complex Instruction Set Computer and are chips that are easy to program and which make efficient use of memory.
Since the earliest machines were programmed in assembly
language and memory was slow and expensive, the CISC
philosophy made sense, and was commonly implemented in such
large computers as the PDP-11 and the DECsystem 10 and 20
machines.
Most common microprocessor designs such as the Intel 80x86 and Motorola 68K series followed the CISC philosophy.

What is CISC?
But recent changes in software and hardware technology have
forced a re-examination of CISC and many modern CISC
processors are hybrids, implementing many RISC principles.
It shifts most of the burden of generating machine instructions to the processor.
For example, instead of having to make a compiler write long machine instructions to calculate a square-root, a CISC processor would have a built-in ability to do this.

CISC Attributes
The design constraints that led to the development of CISC (small amounts of slow memory and fact that most early machines were programmed in assembly language) give CISC instructions sets some common characteristics:

A 2-operand format, where instructions have a source and a
destination.
Register to register, register to memory, and memory to register commands.
Multiple addressing modes for memory, including specialized modes for indexing through arrays
Variable length...
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