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Cache Coherence

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Cache Coherence
Computer Organization & Architecture
Cache Memory
1. Introduction
Computer memory is organized into a hierarchy. At the highest level (closest to the processor) are the processor registers. Next comes one or more levels of cache. When multiple levels are used, they are denoted L1, L2, etc… Next comes main memory, which is usually made out of a dynamic random-access memory (DRAM). All of these are considered internal to the computer system.
The hierarchy continues with external memory, with the next level typically being a fixed hard disk, and one or more levels below that consisting of removable media such as ZIP cartridges(خراطيش), optical disks, and tape. As one goes down the memory hierarchy, one finds decreasing cost/bit, increasing capacity, and slower access time. It would be nice to use only the fastest memory, but because that is the most expensive memory, we trade off access time and cost by using more of the slower memory. The trick is to organize the data and programs in memory so that the memory words needed are usually in the fastest memory. In general, it is likely that most future accesses to main memory by the processor will be to locations recently accesses. So the cache automatically retains a copy of some of the recently used words from the DRAM. If the cache is designed properly, then most of the time the processor will request memory words that are already in the cache.
2. Computer Memory System Overview
Characteristics of Memory Systems Location | • Processor• Internal – main memory• External – secondary memory | Capacity | * Word size – natural unit or organization * Number of words – number of bytes | Unit of Transfer | • Internalo Usually governed by bus width• Externalo Usually a block which is much larger than a word• Addressable unito Smallest location which can be uniquely addressedo Cluster on external disk | Access Methods | • Sequential – tapeo Start at the beginning and read through in ordero Access time

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