Addressing Modes

Only available on StudyMode
  • Download(s) : 86
  • Published : October 14, 2012
Open Document
Text Preview
Module 4

Addressing Modes

68000 Microprocessor 68000

Addressing Modes
Aims
To review 68000 data transfer instructions and applying the more advanced addressing modes.

Intended Learning Outcomes
At the end of this module, students should be able to

Understand:
Address register indirect addressing modes (4 variations) Program Counter addressing modes (2 variations)

At the beginning we review some of the addressing modes:
Register indirect addressing mode Immediate addressing mode Absolute long addressing mode Inherent addressing mode

Dr. Izzeldin Ibrahim

4-2

68000 Microprocessor 68000

68000 Addressing Modes
The 68000 Addressing Modes are:
Register Direct Group
Data Register Direct* Address Register Direct*

Immediate* Address Register Indirect Group
Address Register Indirect* Address Register Indirect with Postincrement Address Register Indirect with Predecrement Address Register Indirect with Displacement Address Register Indirect with Index

Absolute Group*
Absolute Short* Absolute Long*

Program Counter Relative Group
Program Counter with Displacement Program Counter with Index

Implicit*

* Already covered
Dr. Izzeldin Ibrahim

4-3

68000 Microprocessor 68000

Review: ARI Examples
•Register Indirect: accesses the contents of the memory location in the indicated register. Registers D2 AABB CC12 MOVE.B (A0), D2 D3 A0 FFFF EEEE 0000 2000

Registers D2 AABB CCDD D3 A0 FFFF EEEE 0000 2000 MOVE.W (A0), D2

Registers D2 AABB 1234 D3 A0 FFFF EEEE 0000 2000

Memory 002000 002002 002004

1234 5678 ABCD MOVE.L (A0), D2

Registers D2 1234 5678 D3 A0 FFFF EEEE 0000 2000
4-4

Dr. Izzeldin Ibrahim

68000 Microprocessor 68000

Review: Immediate Addressing Mode Examples
•Immediate: an actual number X is provided. MOVE.B #12, D2 Registers D2 AABB CC0C D3 A0 FFFF EEEE 0000 2000

Registers D2 AABB CCDD D3 A0 FFFF EEEE 0000 2000 MOVE.W #$12, D2

Registers D2 AABB 0012 D3 A0 FFFF EEEE 0000 2000

Memory 002000 002002 002004

1234 5678 ABCD MOVE.L #12, D2

Registers D2 0000 000C D3 A0 FFFF EEEE 0000 2000
4-5

Dr. Izzeldin Ibrahim

68000 Microprocessor 68000

Absolute Long Examples
•Absolute Long: accesses the contents of the indicated MOVE.W $002000, D2 memory location. Registers D2 AABB 1234 D3 A0 Registers D2 AABB CCDD D3 A0 FFFF EEEE 0000 2000 MOVE.B $002000, D2 FFFF EEEE 0000 2000

Registers D2 AABB CC12 D3 A0 FFFF EEEE 0000 2000

Memory 002000 002002 002004

1234 5678 ABCD MOVE.L $002000, D2

Registers D2 1234 5678 D3 A0 FFFF EEEE 0000 2000
4-6

Dr. Izzeldin Ibrahim

68000 Microprocessor 68000

Inherent
CCR = Condition Code Register (8bit)
to CCR
ANDI EORI MOVE ORI

SR = Status Register (16bit)
to SR
ANDI EORI MOVE ORI

from SR
MOVE
Dr. Izzeldin Ibrahim

4-7

68000 Microprocessor 68000

ARI with Postincrement
This addressing mode is indicated by a plus sign (“+”) after the parenthesis enclosing the address register (e.g. (An)+). Whether used to specify the source or destination location, the read or write of data takes place BEFORE the address register is incremented. After reading or writing data, the address register is incremented by the number of bytes in the operand, as follows: Operand Size Byte Word Longword Incremented by…. 1 2 4

Dr. Izzeldin Ibrahim

4-8

68000 Microprocessor 68000

ARI with Postincrement

Dr. Izzeldin Ibrahim

4-9

68000 Microprocessor 68000

ARI with Postincrement Examples
•Post-increment: Operand is accessed indirectly, then address register is incremented. MOVE.B (A0)+, D2 Registers D2 AABB CC12 D3 A0 AABB CCDD 0000 2001

Registers D2 AABB CCDD D3 A0 FFFF EEEE 0000 2000 MOVE.W (A0)+, D2

Registers D2 AABB 1234 D3 A0 FFFF EEEE 0000 2002

Memory 002000 002002 002004

1234 5678 ABCD MOVE.L (A0)+, D2

Registers D2 1234 5678 D3 A0 FFFF EEEE 0000 2004
4-10

Dr. Izzeldin Ibrahim

68000 Microprocessor 68000

ARI with Predecrement
This addressing...
tracking img